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Participant bjackson_ost
Participant
466 Views
Registered: ‎03-12-2018

Over-riding constraints

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I'm currently using Vivado 2017.3.1. I designed a DDR controller using the IP Catalog. I understand that the tool generates corresponding XDC files for clock frequency and pin locations. I instantiate the DDR controller in a top-level design that has its own constraints. The issue I'm encountering is that I need to re-assign most of the pic locations that the tool generated for DDR controller. In my Synthesis window, I do the pin re-assignments. But, when I re-run synthesis, I get critical warnings that there are pin conflicts associated with the DDR controller.  For example, the tool assigned location A3 to a specific port but I re-assigned that same pin to location B4. The critical warning basically says I can't assign pin B4 because the port is already assigned to A3. It looks like Vivado pulled in the XDC files for the DDR controller. 

 

Would I need to manually modify the XDC of the DDR controller itself to rectify this issue?

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1 Solution

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Moderator
Moderator
493 Views
Registered: ‎05-31-2017

Re: Over-riding constraints

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Hi @bjackson_ost,

 

Please check page 104 of UG896 on how to override IP XDC constraints.

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Moderator
Moderator
494 Views
Registered: ‎05-31-2017

Re: Over-riding constraints

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Hi @bjackson_ost,

 

Please check page 104 of UG896 on how to override IP XDC constraints.

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