02-17-2016 08:23 AM - edited 02-17-2016 08:27 AM
I have a Kintex 160T design that I run through synthesis. If I then look at the utilisation summary it says that it uses 128.5 BRAMs. If I then open the design and do a report_utilisation cmd it says that it uses 192 (36k) and 97 (18k). Why is the first figure lower than the actual?
02-17-2016 08:31 AM
Synthesis 'solves' the needs of the design by assigning the base tiles (elements) required.
Place then determines how to meet the needs, and modifies the design by actually choosing the physical blocks. The numbers may (and do) change at this step.
Finally route connects the elements placed, and may rip up, replace, and reroute to finish the design, and meet timing.
Especially if resources are not all used (design is sparse) using more of anything is easier (and faster) and hence preferred (as time to a solution and bitstream is paramount).
Does that help? Only the final design represents the usage: everything prior is merely a reflection of what the tools at each step have done.
02-17-2016 08:39 AM
This is just the synthesis step before p&r. So if I open the synthesized design and run the report_utilisation cmd I get the numbers shown. But they are a lot different from the first number. The other values LUT, FF etc are correct.
02-17-2016 08:39 AM
Are you comparing the post synthesis utilization numbers generated by tool vs the ones seen with report_utilization command?
If OOC IP's in your design are contributing to the BRAM resources then the post synthesis report will not list these BRAM's as the IP will be considered as black box during synthesis. When you open synthesized design it loads IP DCP's hence it reports the total design utilization.
The post implementation utilization numbers generated by tool will include IP utilization too.
02-17-2016 08:02 PM
Did my earlier post answer your query? If no, please attach the snapshots of the reports which you are referring to.