09-18-2020 01:35 PM - edited 09-18-2020 01:37 PM
I am getting the EXCEPTION_ACCESS_VIOLATION when I try to open up my completed synthesis run. The design is rather large (Virtex Ultrascale+ VU37P) and has a very big block design. I'm not sure how to debug this issue. I've attached the debug logs / dmp files it generates. It is pretty frustrating.
Upgrading to a newer version of Vivado is something I cannot do (company restricted).
Any help would be appreciated.
Windows 10 OS, 64GB RAM
09-18-2020 11:51 PM
Since you have a BD design, there must be OOC runs for the IP's used in BD. Can you try changing the output product generation from per BD to per IP or vice versa and then try opening the design.
I suspect that the tool is crashing when it is trying to read checkpoint for one of the IP's, and using the above method we can confirm if that is the case.
09-19-2020 04:13 PM