08-23-2011 02:54 AM
i'm trying to synthesis a structural vhdl code, and my question is, if there is any posibility to edit the rtl schematic. Also i want to save it and convert it into structural code?
08-23-2011 03:05 AM
You cannot edit the RTL Schematic.
You can use Netgen to generate post-synthesis (gate-level) simulation model file. Not sure if this is the structural code you want. Refer to "Command Line tools User Guide" for information of Netgen.
Vivian
08-23-2011 04:39 AM
ok, thanks, but verilog source can be converted ratter in a schematic source type?
08-23-2011 09:41 AM
@etti411g wrote:
ok, thanks, but verilog source can be converted ratter in a schematic source type?
My parser blew up on this.