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moncefou
Visitor
Visitor
249 Views
Registered: ‎05-17-2021

missing externel ports when trying to configure constraints

i made this design :

Capture.PNG

 the synthesis runs ok , but after that when i open the synthesised design to do the port mapping i cant find find all the ports some are missing :

kjjjj.PNG

 

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2 Replies
kdeshwal
Xilinx Employee
Xilinx Employee
184 Views
Registered: ‎11-12-2019

Hi @moncefou ,

Can you implement the design and check if you observe the similar issue?
I think it won't see it after implementation.

Thanks,
Kuldeep 

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anusheel
Moderator
Moderator
119 Views
Registered: ‎07-21-2014

Hi @moncefou 

Are you managing the wrapper or Vivado? Please verify whether the wrapper file is updated or not with all the BD ouputs/inputs. 

Thanks
Anusheel 

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