06-17-2021 02:23 AM
i made this design :
the synthesis runs ok , but after that when i open the synthesised design to do the port mapping i cant find find all the ports some are missing :
06-18-2021 11:16 AM
Hi @moncefou ,
Can you implement the design and check if you observe the similar issue?
I think it won't see it after implementation.
06-21-2021 09:31 AM