cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 
bigbrett
Adventurer
Adventurer
8,206 Views
Registered: ‎07-08-2016

synthesis warnings (clock constraints) do not reflect actual content of xdc file:

 

When I synthesize my design, I get the below warnings, however the actual xdc file does not contain the text it is complaining about. I have opened the files on the path specified by the message in an external editor, as well as in vivado, and it still does not match up with what the synthesis engine is complaining about. Is there some hidden environment variable that makes vivado think it is looking at the correct constraints file, when it really is not?

 

Processing XDC Constraints
Initializing timing engine
Parsing XDC File [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_fifo_generator_1_0/gmii_to_rgmii_axis_fifo_generator_1_0/gmii_to_rgmii_axis_fifo_generator_1_0.xdc] for cell 'gmii_to_rgmii_axis_i/gmii_1_rx_fifo/U0'
Finished Parsing XDC File [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_fifo_generator_1_0/gmii_to_rgmii_axis_fifo_generator_1_0/gmii_to_rgmii_axis_fifo_generator_1_0.xdc] for cell 'gmii_to_rgmii_axis_i/gmii_1_rx_fifo/U0'
Parsing XDC File [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_fifo_generator_2_0/gmii_to_rgmii_axis_fifo_generator_2_0/gmii_to_rgmii_axis_fifo_generator_2_0.xdc] for cell 'gmii_to_rgmii_axis_i/gmii_0_tx_fifo/U0'
Finished Parsing XDC File [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_fifo_generator_2_0/gmii_to_rgmii_axis_fifo_generator_2_0/gmii_to_rgmii_axis_fifo_generator_2_0.xdc] for cell 'gmii_to_rgmii_axis_i/gmii_0_tx_fifo/U0'
Parsing XDC File [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_fifo_generator_3_0/gmii_to_rgmii_axis_fifo_generator_3_0/gmii_to_rgmii_axis_fifo_generator_3_0.xdc] for cell 'gmii_to_rgmii_axis_i/gmii_1_tx_fifo/U0'
Finished Parsing XDC File [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_fifo_generator_3_0/gmii_to_rgmii_axis_fifo_generator_3_0/gmii_to_rgmii_axis_fifo_generator_3_0.xdc] for cell 'gmii_to_rgmii_axis_i/gmii_1_tx_fifo/U0'
Parsing XDC File [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_0_rx_fifo_0/gmii_to_rgmii_axis_gmii_0_rx_fifo_0/gmii_to_rgmii_axis_gmii_0_rx_fifo_0.xdc] for cell 'gmii_to_rgmii_axis_i/gmii_0_rx_fifo/U0'
Finished Parsing XDC File [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_0_rx_fifo_0/gmii_to_rgmii_axis_gmii_0_rx_fifo_0/gmii_to_rgmii_axis_gmii_0_rx_fifo_0.xdc] for cell 'gmii_to_rgmii_axis_i/gmii_0_rx_fifo/U0'
Parsing XDC File [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_0_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_0_0.xdc] for cell 'gmii_to_rgmii_axis_i/gmii_to_rgmii_0/U0'
Finished Parsing XDC File [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_0_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_0_0.xdc] for cell 'gmii_to_rgmii_axis_i/gmii_to_rgmii_0/U0'
INFO: [Project 1-236] Implementation specific constraints were found while reading constraint file [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_0_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_0_0.xdc]. These constraints will be ignored for synthesis but will be used in implementation. Impacted constraints are listed in the file [.Xil/gmii_to_rgmii_axis_wrapper_propImpl.xdc].
Resolution: To avoid this warning, move constraints listed in [.Xil/gmii_to_rgmii_axis_wrapper_propImpl.xdc] to another XDC file and exclude this new file from synthesis with the used_in_synthesis property (File Properties dialog in GUI) and re-run elaboration/synthesis.
Parsing XDC File [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_1_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_1_0.xdc] for cell 'gmii_to_rgmii_axis_i/gmii_to_rgmii_1/U0'
Finished Parsing XDC File [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_1_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_1_0.xdc] for cell 'gmii_to_rgmii_axis_i/gmii_to_rgmii_1/U0'
INFO: [Project 1-236] Implementation specific constraints were found while reading constraint file [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_1_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_1_0.xdc]. These constraints will be ignored for synthesis but will be used in implementation. Impacted constraints are listed in the file [.Xil/gmii_to_rgmii_axis_wrapper_propImpl.xdc].
Resolution: To avoid this warning, move constraints listed in [.Xil/gmii_to_rgmii_axis_wrapper_propImpl.xdc] to another XDC file and exclude this new file from synthesis with the used_in_synthesis property (File Properties dialog in GUI) and re-run elaboration/synthesis.
Parsing XDC File [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/constrs_1/imports/constraints/zedboard.xdc]
Finished Parsing XDC File [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/constrs_1/imports/constraints/zedboard.xdc]
Parsing XDC File [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.runs/synth_1/dont_touch.xdc]
Finished Parsing XDC File [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.runs/synth_1/dont_touch.xdc]
INFO: [Project 1-236] Implementation specific constraints were found while reading constraint file [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.runs/synth_1/dont_touch.xdc]. These constraints will be ignored for synthesis but will be used in implementation. Impacted constraints are listed in the file [.Xil/gmii_to_rgmii_axis_wrapper_propImpl.xdc].
Resolution: To avoid this warning, move constraints listed in [.Xil/gmii_to_rgmii_axis_wrapper_propImpl.xdc] to another XDC file and exclude this new file from synthesis with the used_in_synthesis property (File Properties dialog in GUI) and re-run elaboration/synthesis.
INFO: [Timing 38-2] Deriving generated clocks
Parsing XDC File [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_fifo_generator_1_0/gmii_to_rgmii_axis_fifo_generator_1_0/gmii_to_rgmii_axis_fifo_generator_1_0_clocks.xdc] for cell 'gmii_to_rgmii_axis_i/gmii_1_rx_fifo/U0'
WARNING: [Vivado 12-1008] No clocks found for command 'get_clocks -of_objects [get_ports m_aclk_gmii_1_rx_fifo]'. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_fifo_generator_1_0/gmii_to_rgmii_axis_fifo_generator_1_0/gmii_to_rgmii_axis_fifo_generator_1_0_clocks.xdc:53]
Resolution: Verify the create_clock command was called to create the clock object before it is referenced.
INFO: [Vivado 12-626] No clocks found. Please use 'create_clock' or 'create_generated_clock' command to create clocks. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_fifo_generator_1_0/gmii_to_rgmii_axis_fifo_generator_1_0/gmii_to_rgmii_axis_fifo_generator_1_0_clocks.xdc:53]
Finished Parsing XDC File [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_fifo_generator_1_0/gmii_to_rgmii_axis_fifo_generator_1_0/gmii_to_rgmii_axis_fifo_generator_1_0_clocks.xdc] for cell 'gmii_to_rgmii_axis_i/gmii_1_rx_fifo/U0'
INFO: [Project 1-236] Implementation specific constraints were found while reading constraint file [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_fifo_generator_1_0/gmii_to_rgmii_axis_fifo_generator_1_0/gmii_to_rgmii_axis_fifo_generator_1_0_clocks.xdc]. These constraints will be ignored for synthesis but will be used in implementation. Impacted constraints are listed in the file [.Xil/gmii_to_rgmii_axis_wrapper_propImpl.xdc].
Resolution: To avoid this warning, move constraints listed in [.Xil/gmii_to_rgmii_axis_wrapper_propImpl.xdc] to another XDC file and exclude this new file from synthesis with the used_in_synthesis property (File Properties dialog in GUI) and re-run elaboration/synthesis.
Parsing XDC File [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_fifo_generator_2_0/gmii_to_rgmii_axis_fifo_generator_2_0/gmii_to_rgmii_axis_fifo_generator_2_0_clocks.xdc] for cell 'gmii_to_rgmii_axis_i/gmii_0_tx_fifo/U0'
WARNING: [Vivado 12-1008] No clocks found for command 'get_clocks -of_objects [get_ports s_aclk_gmii_0_tx_fifo]'. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_fifo_generator_2_0/gmii_to_rgmii_axis_fifo_generator_2_0/gmii_to_rgmii_axis_fifo_generator_2_0_clocks.xdc:52]
Resolution: Verify the create_clock command was called to create the clock object before it is referenced.
INFO: [Vivado 12-626] No clocks found. Please use 'create_clock' or 'create_generated_clock' command to create clocks. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_fifo_generator_2_0/gmii_to_rgmii_axis_fifo_generator_2_0/gmii_to_rgmii_axis_fifo_generator_2_0_clocks.xdc:52]
WARNING: [Vivado 12-1008] No clocks found for command 'get_clocks -of_objects [get_ports -scoped_to_current_instance m_aclk]'. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_fifo_generator_2_0/gmii_to_rgmii_axis_fifo_generator_2_0/gmii_to_rgmii_axis_fifo_generator_2_0_clocks.xdc:53]
Resolution: Verify the create_clock command was called to create the clock object before it is referenced.
INFO: [Vivado 12-626] No clocks found. Please use 'create_clock' or 'create_generated_clock' command to create clocks. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_fifo_generator_2_0/gmii_to_rgmii_axis_fifo_generator_2_0/gmii_to_rgmii_axis_fifo_generator_2_0_clocks.xdc:53]
Finished Parsing XDC File [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_fifo_generator_2_0/gmii_to_rgmii_axis_fifo_generator_2_0/gmii_to_rgmii_axis_fifo_generator_2_0_clocks.xdc] for cell 'gmii_to_rgmii_axis_i/gmii_0_tx_fifo/U0'
INFO: [Project 1-236] Implementation specific constraints were found while reading constraint file [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_fifo_generator_2_0/gmii_to_rgmii_axis_fifo_generator_2_0/gmii_to_rgmii_axis_fifo_generator_2_0_clocks.xdc]. These constraints will be ignored for synthesis but will be used in implementation. Impacted constraints are listed in the file [.Xil/gmii_to_rgmii_axis_wrapper_propImpl.xdc].
Resolution: To avoid this warning, move constraints listed in [.Xil/gmii_to_rgmii_axis_wrapper_propImpl.xdc] to another XDC file and exclude this new file from synthesis with the used_in_synthesis property (File Properties dialog in GUI) and re-run elaboration/synthesis.
Parsing XDC File [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_fifo_generator_3_0/gmii_to_rgmii_axis_fifo_generator_3_0/gmii_to_rgmii_axis_fifo_generator_3_0_clocks.xdc] for cell 'gmii_to_rgmii_axis_i/gmii_1_tx_fifo/U0'
WARNING: [Vivado 12-1008] No clocks found for command 'get_clocks -of_objects [get_ports s_aclk_gmii_1_tx_fifo]'. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_fifo_generator_3_0/gmii_to_rgmii_axis_fifo_generator_3_0/gmii_to_rgmii_axis_fifo_generator_3_0_clocks.xdc:52]
Resolution: Verify the create_clock command was called to create the clock object before it is referenced.
INFO: [Vivado 12-626] No clocks found. Please use 'create_clock' or 'create_generated_clock' command to create clocks. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_fifo_generator_3_0/gmii_to_rgmii_axis_fifo_generator_3_0/gmii_to_rgmii_axis_fifo_generator_3_0_clocks.xdc:52]
WARNING: [Vivado 12-1008] No clocks found for command 'get_clocks -of_objects [get_ports -scoped_to_current_instance m_aclk]'. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_fifo_generator_3_0/gmii_to_rgmii_axis_fifo_generator_3_0/gmii_to_rgmii_axis_fifo_generator_3_0_clocks.xdc:53]
Resolution: Verify the create_clock command was called to create the clock object before it is referenced.
INFO: [Vivado 12-626] No clocks found. Please use 'create_clock' or 'create_generated_clock' command to create clocks. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_fifo_generator_3_0/gmii_to_rgmii_axis_fifo_generator_3_0/gmii_to_rgmii_axis_fifo_generator_3_0_clocks.xdc:53]
Finished Parsing XDC File [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_fifo_generator_3_0/gmii_to_rgmii_axis_fifo_generator_3_0/gmii_to_rgmii_axis_fifo_generator_3_0_clocks.xdc] for cell 'gmii_to_rgmii_axis_i/gmii_1_tx_fifo/U0'
INFO: [Project 1-236] Implementation specific constraints were found while reading constraint file [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_fifo_generator_3_0/gmii_to_rgmii_axis_fifo_generator_3_0/gmii_to_rgmii_axis_fifo_generator_3_0_clocks.xdc]. These constraints will be ignored for synthesis but will be used in implementation. Impacted constraints are listed in the file [.Xil/gmii_to_rgmii_axis_wrapper_propImpl.xdc].
Resolution: To avoid this warning, move constraints listed in [.Xil/gmii_to_rgmii_axis_wrapper_propImpl.xdc] to another XDC file and exclude this new file from synthesis with the used_in_synthesis property (File Properties dialog in GUI) and re-run elaboration/synthesis.
Parsing XDC File [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_0_rx_fifo_0/gmii_to_rgmii_axis_gmii_0_rx_fifo_0/gmii_to_rgmii_axis_gmii_0_rx_fifo_0_clocks.xdc] for cell 'gmii_to_rgmii_axis_i/gmii_0_rx_fifo/U0'
WARNING: [Vivado 12-1008] No clocks found for command 'get_clocks -of_objects [get_ports m_aclk_gmii_0_rx_fifo]'. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_0_rx_fifo_0/gmii_to_rgmii_axis_gmii_0_rx_fifo_0/gmii_to_rgmii_axis_gmii_0_rx_fifo_0_clocks.xdc:53]
Resolution: Verify the create_clock command was called to create the clock object before it is referenced.
INFO: [Vivado 12-626] No clocks found. Please use 'create_clock' or 'create_generated_clock' command to create clocks. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_0_rx_fifo_0/gmii_to_rgmii_axis_gmii_0_rx_fifo_0/gmii_to_rgmii_axis_gmii_0_rx_fifo_0_clocks.xdc:53]
Finished Parsing XDC File [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_0_rx_fifo_0/gmii_to_rgmii_axis_gmii_0_rx_fifo_0/gmii_to_rgmii_axis_gmii_0_rx_fifo_0_clocks.xdc] for cell 'gmii_to_rgmii_axis_i/gmii_0_rx_fifo/U0'
INFO: [Project 1-236] Implementation specific constraints were found while reading constraint file [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_0_rx_fifo_0/gmii_to_rgmii_axis_gmii_0_rx_fifo_0/gmii_to_rgmii_axis_gmii_0_rx_fifo_0_clocks.xdc]. These constraints will be ignored for synthesis but will be used in implementation. Impacted constraints are listed in the file [.Xil/gmii_to_rgmii_axis_wrapper_propImpl.xdc].
Resolution: To avoid this warning, move constraints listed in [.Xil/gmii_to_rgmii_axis_wrapper_propImpl.xdc] to another XDC file and exclude this new file from synthesis with the used_in_synthesis property (File Properties dialog in GUI) and re-run elaboration/synthesis.
Parsing XDC File [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_0_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_0_0_clocks.xdc] for cell 'gmii_to_rgmii_axis_i/gmii_to_rgmii_0/U0'
INFO: [Constraints 18-483] create_clock: no pin(s)/port(s)/net(s) specified as objects, only virtual clock 'gmii_to_rgmii_axis_gmii_to_rgmii_0_0_rgmii_rx_clk' will be created. If you don't want this, please specify pin(s)/ports(s)/net(s) as objects to the command. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_0_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_0_0_clocks.xdc:7]
WARNING: [Designutils 20-1567] Use of 'set_false_path' with '-hold' is not supported by synthesis. The constraint will not be passed to synthesis. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_0_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_0_0_clocks.xdc:20]
WARNING: [Designutils 20-1567] Use of 'set_false_path' with '-hold' is not supported by synthesis. The constraint will not be passed to synthesis. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_0_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_0_0_clocks.xdc:21]
WARNING: [Vivado 12-1008] No clocks found for command 'get_clocks -include_generated_clocks -of_objects [get_pins -of [get_cells -hier -filter {name =~ *i_bufgmux_gmii_clk}] -filter {name =~ *O}]'. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_0_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_0_0_clocks.xdc:26]
Resolution: Verify the create_clock command was called to create the clock object before it is referenced.
INFO: [Vivado 12-626] No clocks found. Please use 'create_clock' or 'create_generated_clock' command to create clocks. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_0_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_0_0_clocks.xdc:26]
WARNING: [Vivado 12-627] No clocks matched 'gmii_clk_125m*'. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_0_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_0_0_clocks.xdc:27]
INFO: [Vivado 12-626] No clocks found. Please use 'create_clock' or 'create_generated_clock' command to create clocks. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_0_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_0_0_clocks.xdc:27]
CRITICAL WARNING: [Constraints 18-853] create_generated_clock: master clock not found. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_0_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_0_0_clocks.xdc:27]
WARNING: [Vivado 12-627] No clocks matched 'rgmii_tx_clk'. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_0_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_0_0_clocks.xdc:30]
INFO: [Vivado 12-626] No clocks found. Please use 'create_clock' or 'create_generated_clock' command to create clocks. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_0_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_0_0_clocks.xdc:30]
CRITICAL WARNING: [Vivado 12-4739] set_false_path:No valid object(s) found for '-fall_from [get_clocks -of_objects [get_pins gmii_to_rgmii_axis_i/gmii_to_rgmii_0/U0/i_gmii_to_rgmii_block/i_bufgmux_gmii_clk/O]]'. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_0_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_0_0_clocks.xdc:30]
Resolution: Check if the specified object(s) exists in the current design. If it does, ensure that the correct design hierarchy was specified for the object. If you are working with clocks, make sure create_clock was used to create the clock object before it is referenced.
WARNING: [Vivado 12-627] No clocks matched 'rgmii_tx_clk'. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_0_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_0_0_clocks.xdc:31]
INFO: [Vivado 12-626] No clocks found. Please use 'create_clock' or 'create_generated_clock' command to create clocks. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_0_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_0_0_clocks.xdc:31]
CRITICAL WARNING: [Vivado 12-4739] set_false_path:No valid object(s) found for '-rise_from [get_clocks -of_objects [get_pins gmii_to_rgmii_axis_i/gmii_to_rgmii_0/U0/i_gmii_to_rgmii_block/i_bufgmux_gmii_clk/O]]'. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_0_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_0_0_clocks.xdc:31]
Resolution: Check if the specified object(s) exists in the current design. If it does, ensure that the correct design hierarchy was specified for the object. If you are working with clocks, make sure create_clock was used to create the clock object before it is referenced.
WARNING: [Designutils 20-1567] Use of 'set_false_path' with '-hold' is not supported by synthesis. The constraint will not be passed to synthesis. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_0_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_0_0_clocks.xdc:32]
WARNING: [Designutils 20-1567] Use of 'set_false_path' with '-hold' is not supported by synthesis. The constraint will not be passed to synthesis. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_0_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_0_0_clocks.xdc:33]
WARNING: [Vivado 12-627] No clocks matched 'rgmii_tx_clk'. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_0_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_0_0_clocks.xdc:35]
INFO: [Vivado 12-626] No clocks found. Please use 'create_clock' or 'create_generated_clock' command to create clocks. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_0_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_0_0_clocks.xdc:35]
CRITICAL WARNING: [Vivado 12-4739] set_output_delay:No valid object(s) found for '-clock [get_clocks rgmii_tx_clk]'. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_0_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_0_0_clocks.xdc:35]
Resolution: Check if the specified object(s) exists in the current design. If it does, ensure that the correct design hierarchy was specified for the object. If you are working with clocks, make sure create_clock was used to create the clock object before it is referenced.
WARNING: [Vivado 12-627] No clocks matched 'rgmii_tx_clk'. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_0_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_0_0_clocks.xdc:36]
INFO: [Vivado 12-626] No clocks found. Please use 'create_clock' or 'create_generated_clock' command to create clocks. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_0_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_0_0_clocks.xdc:36]
CRITICAL WARNING: [Vivado 12-4739] set_output_delay:No valid object(s) found for '-clock [get_clocks rgmii_tx_clk]'. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_0_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_0_0_clocks.xdc:36]
Resolution: Check if the specified object(s) exists in the current design. If it does, ensure that the correct design hierarchy was specified for the object. If you are working with clocks, make sure create_clock was used to create the clock object before it is referenced.
WARNING: [Vivado 12-627] No clocks matched 'rgmii_tx_clk'. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_0_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_0_0_clocks.xdc:37]
INFO: [Vivado 12-626] No clocks found. Please use 'create_clock' or 'create_generated_clock' command to create clocks. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_0_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_0_0_clocks.xdc:37]
CRITICAL WARNING: [Vivado 12-4739] set_output_delay:No valid object(s) found for '-clock [get_clocks rgmii_tx_clk]'. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_0_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_0_0_clocks.xdc:37]
Resolution: Check if the specified object(s) exists in the current design. If it does, ensure that the correct design hierarchy was specified for the object. If you are working with clocks, make sure create_clock was used to create the clock object before it is referenced.
WARNING: [Vivado 12-627] No clocks matched 'rgmii_tx_clk'. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_0_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_0_0_clocks.xdc:38]
INFO: [Vivado 12-626] No clocks found. Please use 'create_clock' or 'create_generated_clock' command to create clocks. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_0_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_0_0_clocks.xdc:38]
CRITICAL WARNING: [Vivado 12-4739] set_output_delay:No valid object(s) found for '-clock [get_clocks rgmii_tx_clk]'. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_0_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_0_0_clocks.xdc:38]
Resolution: Check if the specified object(s) exists in the current design. If it does, ensure that the correct design hierarchy was specified for the object. If you are working with clocks, make sure create_clock was used to create the clock object before it is referenced.
WARNING: [Vivado 12-627] No clocks matched 'rgmii_tx_clk'. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_0_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_0_0_clocks.xdc:40]
INFO: [Vivado 12-626] No clocks found. Please use 'create_clock' or 'create_generated_clock' command to create clocks. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_0_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_0_0_clocks.xdc:40]
CRITICAL WARNING: [Vivado 12-4739] set_multicycle_path:No valid object(s) found for '-rise_from [get_clocks -of_objects [get_pins gmii_to_rgmii_axis_i/gmii_to_rgmii_0/U0/i_gmii_to_rgmii_block/i_bufgmux_gmii_clk/O]]'. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_0_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_0_0_clocks.xdc:40]
Resolution: Check if the specified object(s) exists in the current design. If it does, ensure that the correct design hierarchy was specified for the object. If you are working with clocks, make sure create_clock was used to create the clock object before it is referenced.
WARNING: [Vivado 12-627] No clocks matched 'rgmii_tx_clk'. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_0_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_0_0_clocks.xdc:41]
INFO: [Vivado 12-626] No clocks found. Please use 'create_clock' or 'create_generated_clock' command to create clocks. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_0_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_0_0_clocks.xdc:41]
CRITICAL WARNING: [Vivado 12-4739] set_multicycle_path:No valid object(s) found for '-fall_from [get_clocks -of_objects [get_pins gmii_to_rgmii_axis_i/gmii_to_rgmii_0/U0/i_gmii_to_rgmii_block/i_bufgmux_gmii_clk/O]]'. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_0_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_0_0_clocks.xdc:41]
Resolution: Check if the specified object(s) exists in the current design. If it does, ensure that the correct design hierarchy was specified for the object. If you are working with clocks, make sure create_clock was used to create the clock object before it is referenced.
Finished Parsing XDC File [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_0_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_0_0_clocks.xdc] for cell 'gmii_to_rgmii_axis_i/gmii_to_rgmii_0/U0'
INFO: [Project 1-236] Implementation specific constraints were found while reading constraint file [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_0_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_0_0_clocks.xdc]. These constraints will be ignored for synthesis but will be used in implementation. Impacted constraints are listed in the file [.Xil/gmii_to_rgmii_axis_wrapper_propImpl.xdc].
Resolution: To avoid this warning, move constraints listed in [.Xil/gmii_to_rgmii_axis_wrapper_propImpl.xdc] to another XDC file and exclude this new file from synthesis with the used_in_synthesis property (File Properties dialog in GUI) and re-run elaboration/synthesis.
Parsing XDC File [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_1_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_1_0_clocks.xdc] for cell 'gmii_to_rgmii_axis_i/gmii_to_rgmii_1/U0'
INFO: [Constraints 18-483] create_clock: no pin(s)/port(s)/net(s) specified as objects, only virtual clock 'gmii_to_rgmii_axis_gmii_to_rgmii_1_0_rgmii_rx_clk' will be created. If you don't want this, please specify pin(s)/ports(s)/net(s) as objects to the command. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_1_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_1_0_clocks.xdc:7]
WARNING: [Designutils 20-1567] Use of 'set_false_path' with '-hold' is not supported by synthesis. The constraint will not be passed to synthesis. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_1_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_1_0_clocks.xdc:20]
WARNING: [Designutils 20-1567] Use of 'set_false_path' with '-hold' is not supported by synthesis. The constraint will not be passed to synthesis. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_1_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_1_0_clocks.xdc:21]
WARNING: [Vivado 12-1008] No clocks found for command 'get_clocks -include_generated_clocks -of_objects [get_pins -of [get_cells -hier -filter {name =~ *i_bufgmux_gmii_clk}] -filter {name =~ *O}]'. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_1_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_1_0_clocks.xdc:26]
Resolution: Verify the create_clock command was called to create the clock object before it is referenced.
INFO: [Vivado 12-626] No clocks found. Please use 'create_clock' or 'create_generated_clock' command to create clocks. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_1_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_1_0_clocks.xdc:26]
WARNING: [Vivado 12-627] No clocks matched 'gmii_clk_125m*'. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_1_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_1_0_clocks.xdc:27]
INFO: [Vivado 12-626] No clocks found. Please use 'create_clock' or 'create_generated_clock' command to create clocks. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_1_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_1_0_clocks.xdc:27]
CRITICAL WARNING: [Constraints 18-853] create_generated_clock: master clock not found. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_1_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_1_0_clocks.xdc:27]
WARNING: [Vivado 12-627] No clocks matched 'rgmii_tx_clk'. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_1_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_1_0_clocks.xdc:30]
INFO: [Vivado 12-626] No clocks found. Please use 'create_clock' or 'create_generated_clock' command to create clocks. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_1_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_1_0_clocks.xdc:30]
CRITICAL WARNING: [Vivado 12-4739] set_false_path:No valid object(s) found for '-fall_from [get_clocks -of_objects [get_pins gmii_to_rgmii_axis_i/gmii_to_rgmii_1/U0/i_bufgmux_gmii_clk/O]]'. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_1_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_1_0_clocks.xdc:30]
Resolution: Check if the specified object(s) exists in the current design. If it does, ensure that the correct design hierarchy was specified for the object. If you are working with clocks, make sure create_clock was used to create the clock object before it is referenced.
WARNING: [Vivado 12-627] No clocks matched 'rgmii_tx_clk'. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_1_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_1_0_clocks.xdc:31]
INFO: [Vivado 12-626] No clocks found. Please use 'create_clock' or 'create_generated_clock' command to create clocks. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_1_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_1_0_clocks.xdc:31]
CRITICAL WARNING: [Vivado 12-4739] set_false_path:No valid object(s) found for '-rise_from [get_clocks -of_objects [get_pins gmii_to_rgmii_axis_i/gmii_to_rgmii_1/U0/i_bufgmux_gmii_clk/O]]'. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_1_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_1_0_clocks.xdc:31]
Resolution: Check if the specified object(s) exists in the current design. If it does, ensure that the correct design hierarchy was specified for the object. If you are working with clocks, make sure create_clock was used to create the clock object before it is referenced.
WARNING: [Designutils 20-1567] Use of 'set_false_path' with '-hold' is not supported by synthesis. The constraint will not be passed to synthesis. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_1_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_1_0_clocks.xdc:32]
WARNING: [Designutils 20-1567] Use of 'set_false_path' with '-hold' is not supported by synthesis. The constraint will not be passed to synthesis. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_1_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_1_0_clocks.xdc:33]
WARNING: [Vivado 12-627] No clocks matched 'rgmii_tx_clk'. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_1_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_1_0_clocks.xdc:35]
INFO: [Vivado 12-626] No clocks found. Please use 'create_clock' or 'create_generated_clock' command to create clocks. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_1_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_1_0_clocks.xdc:35]
CRITICAL WARNING: [Vivado 12-4739] set_output_delay:No valid object(s) found for '-clock [get_clocks rgmii_tx_clk]'. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_1_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_1_0_clocks.xdc:35]
Resolution: Check if the specified object(s) exists in the current design. If it does, ensure that the correct design hierarchy was specified for the object. If you are working with clocks, make sure create_clock was used to create the clock object before it is referenced.
WARNING: [Vivado 12-627] No clocks matched 'rgmii_tx_clk'. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_1_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_1_0_clocks.xdc:36]
INFO: [Vivado 12-626] No clocks found. Please use 'create_clock' or 'create_generated_clock' command to create clocks. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_1_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_1_0_clocks.xdc:36]
CRITICAL WARNING: [Vivado 12-4739] set_output_delay:No valid object(s) found for '-clock [get_clocks rgmii_tx_clk]'. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_1_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_1_0_clocks.xdc:36]
Resolution: Check if the specified object(s) exists in the current design. If it does, ensure that the correct design hierarchy was specified for the object. If you are working with clocks, make sure create_clock was used to create the clock object before it is referenced.
WARNING: [Vivado 12-627] No clocks matched 'rgmii_tx_clk'. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_1_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_1_0_clocks.xdc:37]
INFO: [Vivado 12-626] No clocks found. Please use 'create_clock' or 'create_generated_clock' command to create clocks. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_1_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_1_0_clocks.xdc:37]
CRITICAL WARNING: [Vivado 12-4739] set_output_delay:No valid object(s) found for '-clock [get_clocks rgmii_tx_clk]'. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_1_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_1_0_clocks.xdc:37]
Resolution: Check if the specified object(s) exists in the current design. If it does, ensure that the correct design hierarchy was specified for the object. If you are working with clocks, make sure create_clock was used to create the clock object before it is referenced.
WARNING: [Vivado 12-627] No clocks matched 'rgmii_tx_clk'. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_1_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_1_0_clocks.xdc:38]
INFO: [Vivado 12-626] No clocks found. Please use 'create_clock' or 'create_generated_clock' command to create clocks. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_1_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_1_0_clocks.xdc:38]
CRITICAL WARNING: [Vivado 12-4739] set_output_delay:No valid object(s) found for '-clock [get_clocks rgmii_tx_clk]'. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_1_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_1_0_clocks.xdc:38]
Resolution: Check if the specified object(s) exists in the current design. If it does, ensure that the correct design hierarchy was specified for the object. If you are working with clocks, make sure create_clock was used to create the clock object before it is referenced.
WARNING: [Vivado 12-627] No clocks matched 'rgmii_tx_clk'. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_1_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_1_0_clocks.xdc:40]
INFO: [Vivado 12-626] No clocks found. Please use 'create_clock' or 'create_generated_clock' command to create clocks. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_1_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_1_0_clocks.xdc:40]
CRITICAL WARNING: [Vivado 12-4739] set_multicycle_path:No valid object(s) found for '-rise_from [get_clocks -of_objects [get_pins gmii_to_rgmii_axis_i/gmii_to_rgmii_1/U0/i_bufgmux_gmii_clk/O]]'. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_1_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_1_0_clocks.xdc:40]
Resolution: Check if the specified object(s) exists in the current design. If it does, ensure that the correct design hierarchy was specified for the object. If you are working with clocks, make sure create_clock was used to create the clock object before it is referenced.
WARNING: [Vivado 12-627] No clocks matched 'rgmii_tx_clk'. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_1_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_1_0_clocks.xdc:41]
INFO: [Vivado 12-626] No clocks found. Please use 'create_clock' or 'create_generated_clock' command to create clocks. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_1_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_1_0_clocks.xdc:41]
CRITICAL WARNING: [Vivado 12-4739] set_multicycle_path:No valid object(s) found for '-fall_from [get_clocks -of_objects [get_pins gmii_to_rgmii_axis_i/gmii_to_rgmii_1/U0/i_bufgmux_gmii_clk/O]]'. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_1_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_1_0_clocks.xdc:41]
Resolution: Check if the specified object(s) exists in the current design. If it does, ensure that the correct design hierarchy was specified for the object. If you are working with clocks, make sure create_clock was used to create the clock object before it is referenced.
Finished Parsing XDC File [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_1_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_1_0_clocks.xdc] for cell 'gmii_to_rgmii_axis_i/gmii_to_rgmii_1/U0'
INFO: [Project 1-236] Implementation specific constraints were found while reading constraint file [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_1_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_1_0_clocks.xdc]. These constraints will be ignored for synthesis but will be used in implementation. Impacted constraints are listed in the file [.Xil/gmii_to_rgmii_axis_wrapper_propImpl.xdc].
Resolution: To avoid this warning, move constraints listed in [.Xil/gmii_to_rgmii_axis_wrapper_propImpl.xdc] to another XDC file and exclude this new file from synthesis with the used_in_synthesis property (File Properties dialog in GUI) and re-run elaboration/synthesis.
Completed Processing XDC Constraints

 

 

0 Kudos
5 Replies
bigbrett
Adventurer
Adventurer
8,202 Views
Registered: ‎07-08-2016

for example, the first warning states: 

WARNING: [Vivado 12-1008] No clocks found for command 'get_clocks -of_objects [get_ports m_aclk_gmii_1_rx_fifo]'. [/home/brett/workspace/Vivado_WS/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_fifo_generator_1_0/gmii_to_rgmii_axis_fifo_generator_1_0/gmii_to_rgmii_axis_fifo_generator_1_0_clocks.xdc:53]

however the actual line in the file has the text: 

set rd_clock [get_clocks -of_objects [get_ports m_aclk]]

 

Other errors have similar inconsistencies.

0 Kudos
balkris
Xilinx Employee
Xilinx Employee
8,175 Views
Registered: ‎08-01-2008

check this ARs as well
http://www.xilinx.com/support/answers/55248.html
Thanks and Regards
Balkrishan
--------------------------------------------------------------------------------------------
Please mark the post as an answer "Accept as solution" in case it helped resolve your query.
Give kudos in case a post in case it guided to the solution.
vemulad
Xilinx Employee
Xilinx Employee
8,166 Views
Registered: ‎09-20-2012

Hi @bigbrett

 

I think the port name mentioned in the message m_aclk_gmii_1_rx_fifo is the top level port in your design which is connected to m_aclk IP pin (present in the original constraint).

 

To avoid this warning, define create_clock constraint on top level port m_aclk_gmii_1_rx_fifo

Thanks,
Deepika.
--------------------------------------------------------------------------------------------
Google your question before posting. If someone's post answers your question, mark the post as answer with "Accept as solution". If you see a particularly good and informative post, consider giving it Kudos (the star on the left)
bigbrett
Adventurer
Adventurer
8,145 Views
Registered: ‎07-08-2016

@vemulad thanks for the response. I made that change, and it didn't solve the problem, however I think we are close to honing in on a solution.

 

A few follow up questions for you....

 

  1. You are correct that m_aclk_gmii_1_rx_fifo is a top level port. I was under the impression that if there is a clock required INSIDE of a component/submodule of a hierarchical design, the clock should be created and constrained in the xdc file pertaining to the deepest level of hierarchy....is this not correct? 
  2. I made the change you suggested (constraining m_aclk_gmii_1_rx_fifo, etc. at the top level) by adding the below constraints to the top level
    create_clock -period 8.000 -name m_aclk_gmii_0_rx_fifo [get_ports m_aclk_gmii_0_rx_fifo]
    create_clock -period 8.000 -name m_aclk_gmii_0_rx_fifo [get_ports m_aclk_gmii_1_rx_fifo] 
    create_clock -period 8.000 -name s_aclk_gmii_0_tx_fifo [get_ports s_aclk_gmii_0_tx_fifo] 
    create_clock -period 8.000 -name s_aclk_gmii_0_tx_fifo [get_ports s_aclk_gmii_1_tx_fifo] 
    which resulted in the following synthesis warnings.. 
    WARNING: [Constraints 18-619] A clock with name 'm_aclk_gmii_0_rx_fifo' already exists, overwriting the previous clock with the same name. [/home/brett/Desktop/network-tap-no-ps7/network-tap-no-ps7.srcs/constrs_1/imports/constraints/zedboard.xdc:7]
    WARNING: [Constraints 18-619] A clock with name 's_aclk_gmii_0_tx_fifo' already exists, overwriting the previous clock with the same name. [/home/brett/Desktop/network-tap-no-ps7/network-tap-no-ps7.srcs/constrs_1/imports/constraints/zedboard.xdc:9]
    which makes it seem as if the constraint added was redundant? 
  3. The clock networks in my design (after making the suggested changes to top level xdc) are:
    report_clock_networks
    INFO: [Constraints 18-483] create_clock: no pin(s)/port(s)/net(s) specified as objects, only virtual clock 'gmii_to_rgmii_axis_gmii_to_rgmii_0_0_rgmii_rx_clk' will be created. If you don't want this, please specify pin(s)/ports(s)/net(s) as objects to the command. [/home/brett/Desktop/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_0_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_0_0_clocks.xdc:7]
    INFO: [Constraints 18-483] create_clock: no pin(s)/port(s)/net(s) specified as objects, only virtual clock 'gmii_to_rgmii_axis_gmii_to_rgmii_1_0_rgmii_rx_clk' will be created. If you don't want this, please specify pin(s)/ports(s)/net(s) as objects to the command. [/home/brett/Desktop/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_1_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_1_0_clocks.xdc:7]
    INFO: [Timing 38-35] Done setting XDC timing constraints.
    ...
    Constrained Clocks
    -------------------
    Clock design_1_eth_mac_0_rgmii_rx_clk (125MHz)(endpoints: 131 clock, 0 nonclock)
    Port rgmii_port_0_rxc
    
    Clock design_1_eth_mac_1_rgmii_rx_clk (125MHz)(endpoints: 131 clock, 0 nonclock)
    Port rgmii_port_1_rxc
    
    Clock m_aclk_gmii_0_rx_fifo (125MHz)(endpoints: 115 clock, 0 nonclock)
    Port m_aclk_gmii_1_rx_fifo
    
    Clock s_aclk_gmii_0_tx_fifo (125MHz)(endpoints: 135 clock, 0 nonclock)
    Port s_aclk_gmii_1_tx_fifo
    
    Clock gmii_to_rgmii_axis_gmii_to_rgmii_1_0_rgmii_rx_clk (125MHz)(endpoints: 0 clock, 0 nonclock)
    
    Clock gmii_to_rgmii_axis_gmii_to_rgmii_0_0_rgmii_rx_clk (125MHz)(endpoints: 0 clock, 0 nonclock)
    
    Unconstrained Clocks
    -------------------
    Clock clkin200 (endpoints: 499 clock, 2 nonclock)
    Port clkin200
    
    Clock m_aclk_gmii_0_rx_fifo (endpoints: 115 clock, 0 nonclock)
    Port m_aclk_gmii_0_rx_fifo
    
    Clock s_aclk_gmii_0_tx_fifo (endpoints: 135 clock, 0 nonclock)
    Port s_aclk_gmii_0_tx_fifo
    
    The compile order in the design is: 
    Constraint evaluation order for 'synthesis' with fileset 'sources_1' & with fileset 'constrs_1':
    Index  File Name     Used_In       Scoped_To_Ref  Scoped_To_Cells  Processing_Order  Out_Of_Context  Full Path Name
    -----  ------------  ------------  -------------  ---------------  ----------------  --------------  ---------------------------------------------------------------------------------------------------------
    1      zedboard.xdc  Synth & Impl                                  NORMAL                            /home/brett/Desktop/network-tap-no-ps7/network-tap-no-ps7.srcs/constrs_1/imports/constraints/zedboard.xdc
    
    Constraint evaluation order for 'implementation' with fileset 'sources_1' & with fileset 'constrs_1':
    Index  File Name                                         Used_In       Scoped_To_Ref                          Scoped_To_Cells  Processing_Order  Out_Of_Context  Full Path Name
    -----  ------------------------------------------------  ------------  -------------------------------------  ---------------  ----------------  --------------  ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    1      gmii_to_rgmii_axis_fifo_generator_1_0.xdc         Synth & Impl  gmii_to_rgmii_axis_fifo_generator_1_0  U0               EARLY                             /home/brett/Desktop/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_fifo_generator_1_0/gmii_to_rgmii_axis_fifo_generator_1_0/gmii_to_rgmii_axis_fifo_generator_1_0.xdc
    2      gmii_to_rgmii_axis_fifo_generator_2_0.xdc         Synth & Impl  gmii_to_rgmii_axis_fifo_generator_2_0  U0               EARLY                             /home/brett/Desktop/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_fifo_generator_2_0/gmii_to_rgmii_axis_fifo_generator_2_0/gmii_to_rgmii_axis_fifo_generator_2_0.xdc
    3      gmii_to_rgmii_axis_fifo_generator_3_0.xdc         Synth & Impl  gmii_to_rgmii_axis_fifo_generator_3_0  U0               EARLY                             /home/brett/Desktop/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_fifo_generator_3_0/gmii_to_rgmii_axis_fifo_generator_3_0/gmii_to_rgmii_axis_fifo_generator_3_0.xdc
    4      gmii_to_rgmii_axis_gmii_0_rx_fifo_0.xdc           Synth & Impl  gmii_to_rgmii_axis_gmii_0_rx_fifo_0    U0               EARLY                             /home/brett/Desktop/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_0_rx_fifo_0/gmii_to_rgmii_axis_gmii_0_rx_fifo_0/gmii_to_rgmii_axis_gmii_0_rx_fifo_0.xdc
    5      gmii_to_rgmii_axis_gmii_to_rgmii_0_0.xdc          Synth & Impl  gmii_to_rgmii_axis_gmii_to_rgmii_0_0   U0               EARLY                             /home/brett/Desktop/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_0_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_0_0.xdc
    6      gmii_to_rgmii_axis_gmii_to_rgmii_1_0.xdc          Synth & Impl  gmii_to_rgmii_axis_gmii_to_rgmii_1_0   U0               EARLY                             /home/brett/Desktop/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_1_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_1_0.xdc
    7      zedboard.xdc                                      Synth & Impl                                                          NORMAL                            /home/brett/Desktop/network-tap-no-ps7/network-tap-no-ps7.srcs/constrs_1/imports/constraints/zedboard.xdc
    8      gmii_to_rgmii_axis_fifo_generator_1_0_clocks.xdc  Synth & Impl  gmii_to_rgmii_axis_fifo_generator_1_0  U0               LATE                              /home/brett/Desktop/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_fifo_generator_1_0/gmii_to_rgmii_axis_fifo_generator_1_0/gmii_to_rgmii_axis_fifo_generator_1_0_clocks.xdc
    9      gmii_to_rgmii_axis_fifo_generator_2_0_clocks.xdc  Synth & Impl  gmii_to_rgmii_axis_fifo_generator_2_0  U0               LATE                              /home/brett/Desktop/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_fifo_generator_2_0/gmii_to_rgmii_axis_fifo_generator_2_0/gmii_to_rgmii_axis_fifo_generator_2_0_clocks.xdc
    10     gmii_to_rgmii_axis_fifo_generator_3_0_clocks.xdc  Synth & Impl  gmii_to_rgmii_axis_fifo_generator_3_0  U0               LATE                              /home/brett/Desktop/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_fifo_generator_3_0/gmii_to_rgmii_axis_fifo_generator_3_0/gmii_to_rgmii_axis_fifo_generator_3_0_clocks.xdc
    11     gmii_to_rgmii_axis_gmii_0_rx_fifo_0_clocks.xdc    Synth & Impl  gmii_to_rgmii_axis_gmii_0_rx_fifo_0    U0               LATE                              /home/brett/Desktop/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_0_rx_fifo_0/gmii_to_rgmii_axis_gmii_0_rx_fifo_0/gmii_to_rgmii_axis_gmii_0_rx_fifo_0_clocks.xdc
    12     gmii_to_rgmii_axis_gmii_to_rgmii_0_0_clocks.xdc   Synth & Impl  gmii_to_rgmii_axis_gmii_to_rgmii_0_0   U0               LATE                              /home/brett/Desktop/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_0_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_0_0_clocks.xdc
    13     gmii_to_rgmii_axis_gmii_to_rgmii_1_0_clocks.xdc   Synth & Impl  gmii_to_rgmii_axis_gmii_to_rgmii_1_0   U0               LATE                              /home/brett/Desktop/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_1_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_1_0_clocks.xdc
    

For debugging purposes, you can find the design here: https://www.dropbox.com/s/b3bh4ndcnv3i551/network-tap-no-ps7_8-17.xpr.zip?dl=0

 

Appreciate all of the help. I feel as if I'm very close to solving this one, I just need a good push in the right direction.

 

 

0 Kudos
bigbrett
Adventurer
Adventurer
8,142 Views
Registered: ‎07-08-2016

Also, I should list the output of report_clocks, which has some curious results as well (highlighted in red).

 

report_clocks
INFO: [Constraints 18-483] create_clock: no pin(s)/port(s)/net(s) specified as objects, only virtual clock 'gmii_to_rgmii_axis_gmii_to_rgmii_0_0_rgmii_rx_clk' will be created. If you don't want this, please specify pin(s)/ports(s)/net(s) as objects to the command. [/home/brett/Desktop/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_0_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_0_0_clocks.xdc:7]
INFO: [Constraints 18-483] create_clock: no pin(s)/port(s)/net(s) specified as objects, only virtual clock 'gmii_to_rgmii_axis_gmii_to_rgmii_1_0_rgmii_rx_clk' will be created. If you don't want this, please specify pin(s)/ports(s)/net(s) as objects to the command. [/home/brett/Desktop/network-tap-no-ps7/network-tap-no-ps7.srcs/sources_1/bd/gmii_to_rgmii_axis/ip/gmii_to_rgmii_axis_gmii_to_rgmii_1_0/synth/gmii_to_rgmii_axis_gmii_to_rgmii_1_0_clocks.xdc:7]

Clock Report


Attributes
  P: Propagated
  G: Generated
  V: Virtual
  I: Inverted

Clock                                              Period(ns)  Waveform(ns)   Attributes  Sources
design_1_eth_mac_0_rgmii_rx_clk                    8.000       {0.000 4.000}  P           {rgmii_port_0_rxc}
design_1_eth_mac_1_rgmii_rx_clk                    8.000       {0.000 4.000}  P           {rgmii_port_1_rxc}
C                                                  8.000       {0.000 4.000}  P,G         {gmii_to_rgmii_axis_i/gmii_to_rgmii_0/U0/i_gmii_to_rgmii_block/gmii_to_rgmii_axis_gmii_to_rgmii_0_0_core/i_gmii_to_rgmii/i_gmii_to_rgmii/bufr_rgmii_rx_clk/O}
C_1                                                8.000       {0.000 4.000}  P,G         {gmii_to_rgmii_axis_i/gmii_to_rgmii_1/U0/gmii_to_rgmii_axis_gmii_to_rgmii_1_0_core/i_gmii_to_rgmii/i_gmii_to_rgmii/bufr_rgmii_rx_clk/O}
gmii_to_rgmii_axis_gmii_to_rgmii_0_0_rgmii_rx_clk  8.000       {0.000 4.000}  V           {}
gmii_to_rgmii_axis_gmii_to_rgmii_1_0_rgmii_rx_clk  8.000       {0.000 4.000}  V           {}


====================================================
Generated Clocks
====================================================

Generated Clock   : C
Master Source     : gmii_to_rgmii_axis_i/gmii_to_rgmii_0/U0/i_gmii_to_rgmii_block/gmii_to_rgmii_axis_gmii_to_rgmii_0_0_core/i_gmii_to_rgmii/i_gmii_to_rgmii/bufr_rgmii_rx_clk/I
Master Clock      : design_1_eth_mac_0_rgmii_rx_clk
Divide By         : 1
Generated Sources : {gmii_to_rgmii_axis_i/gmii_to_rgmii_0/U0/i_gmii_to_rgmii_block/gmii_to_rgmii_axis_gmii_to_rgmii_0_0_core/i_gmii_to_rgmii/i_gmii_to_rgmii/bufr_rgmii_rx_clk/O}

Generated Clock   : C_1
Master Source     : gmii_to_rgmii_axis_i/gmii_to_rgmii_1/U0/gmii_to_rgmii_axis_gmii_to_rgmii_1_0_core/i_gmii_to_rgmii/i_gmii_to_rgmii/bufr_rgmii_rx_clk/I
Master Clock      : design_1_eth_mac_1_rgmii_rx_clk
Divide By         : 1
Generated Sources : {gmii_to_rgmii_axis_i/gmii_to_rgmii_1/U0/gmii_to_rgmii_axis_gmii_to_rgmii_1_0_core/i_gmii_to_rgmii/i_gmii_to_rgmii/bufr_rgmii_rx_clk/O}


It seems as if there are 3 sets of clocks of various types created for the same two top-level ports (gmii_to_rgmii_0/rgmii_rxc and gmii_to_rgmii_1/rgmii_rxc). I don't understand why this would be the case, since my toplevel constraints only contain the following clock declarations:

create_clock -period 8.000 -name design_1_eth_mac_0_rgmii_rx_clk -waveform {0.000 4.000} [get_ports rgmii_port_0_rxc]
create_clock -period 8.000 -name design_1_eth_mac_1_rgmii_rx_clk -waveform {0.000 4.000} [get_ports rgmii_port_1_rxc]
0 Kudos