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Observer los_galacticos
Observer
955 Views
Registered: ‎02-17-2018

Connection between receiving data to transmitting one

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Hi everyone.

 

I have 8 bit receiving data. I want to implement the data for using dual dc motor control (4 input). I can give data normally, but i cannot sequence of it. My question is that How do I assign 8 bit data for working sequentially or simultaneously to 4 inputs?

 

Thanks.

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Observer los_galacticos
Observer
1,197 Views
Registered: ‎02-17-2018

Re: Connection between receiving data to transmitting one

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library IEEE;
use IEEE.STD_LOGIC_1164.ALL;

 

entity top_module is

Port (
reset : in STD_LOGIC;
clk : in STD_LOGIC;
din : in STD_LOGIC;
First_A : out STD_LOGIC;
Second_A : out STD_LOGIC;
First_B : out STD_LOGIC;
Second_B : out STD_LOGIC
);

end top_module;

architecture Behavioral of top_module is

 

component sub_mod1
port
(
clk, reset : in std_logic;
desiredDuty : in std_logic_vector(7 downto 0);
pwm_out : out std_logic
);
end component;

component sub_mod2
port
(
clk, reset : in std_logic;
desiredDuty : in std_logic_vector(7 downto 0);
pwm_out : out std_logic
);
end component;

component sub_mod3
port
(
clk, reset : in std_logic;
desiredDuty : in std_logic_vector(7 downto 0);
pwm_out : out std_logic
);
end component;

component sub_mod4
port
(
clk, reset : in std_logic;
desiredDuty : in std_logic_vector(7 downto 0);
pwm_out : out std_logic
);
end component;

 


type state is (ready,start1);
signal ps1 : state := ready;
signal start :std_logic;
signal store :std_logic_vector(7 downto 0) := "00000000";
signal A_p,B_p,A_n,B_n : std_logic_vector(7 downto 0);
signal fw,rw,right,left :std_logic;

 

begin

uut1: sub_mod1

port map(clk=>clk,reset => reset, desiredDuty=>A_p, pwm_out=>First_A);

uut2: sub_mod2

port map(clk=>clk,reset => reset, desiredDuty=>A_n, pwm_out=>Second_A);

uut3: sub_mod3

port map(clk=>clk,reset => reset, desiredDuty=>B_p, pwm_out=>First_B);

uut4: sub_mod4

port map(clk=>clk,reset => reset, desiredDuty=>B_n, pwm_out=>Second_B);

kalika0: process(clk)
variable i : integer := 0;
begin
if clk'event and clk = '1' then

if ps1 = ready then
start <= din;
end if;
----------------start bit detect logic-----------------
if start = '0' then
ps1 <= start1;
else
ps1 <= ready;
end if;

---------------------16xbaudrate sampling method---------------------------
if ps1 = start1 then
i := i + 1;

if i = 2600 then
start <= din;
end if;

if i = 7800 then
store(0) <= din;
end if;

if i = 13000 then
store(1) <= din;
end if;

if i = 18200 then
store(2) <= din;
end if;

if i = 23400 then
store(3) <= din;
end if;

if i = 28600 then
store(4) <= din;
end if;

if i = 33800 then
store(5) <= din;
end if;

if i = 39000 then
store(6) <= din;
end if;

if i = 44200 then
store(7) <= din;
end if;


if i = 54600 then
i := 0;
ps1 <= ready;
end if;
end if;
end if;
end process kalika0;
--dout <= store(7 downto 0);

kalika1: process(clk,reset,store)
variable i,j,k,l,m,n,p,q : integer := 0;
begin
if reset='1' then
fw <= '0';
rw <= '0';
right <= '0';
left <= '0';

elsif rising_edge(clk) then

if store = x"46" then --- forward F
j := 0;
k := 0;
l := 0;
m := 0;
n := 0;
p := 0;
q := 0;
i := i + 1;
if i <= 1005000 then
fw <= '0';
rw <= '0';
right <= '0';
left <= '0';
elsif i > 1005000 and i < 1550000 then
fw <= '1';
rw <= '0';
right <= '0';
left <= '0';
elsif i = 1550000 then
i := 0;
end if;


elsif store = x"42" then ---backward B
i := 0;
k := 0;
l := 0;
m := 0;
n := 0;
p := 0;
q := 0;
j := j + 1;
if j <= 1005000 then
fw <= '0';
rw <= '0';
right <= '0';
left <= '0';
elsif j > 1005000 and j < 1550000 then
fw <= '0';
rw <= '1';
right <= '0';
left <= '0';
elsif i = 1550000 then
j := 0;
end if;


elsif store = x"4C" then ---- left L
i := 0;
j := 0;
l := 0;
m := 0;
n := 0;
p := 0;
q := 0;
k := k + 1;
if k <= 1005000 then
right <= '0';
left <= '0';
fw <= '0';
rw <= '0';
elsif k > 1005000 and k < 1550000 then
right <= '0';
left <= '1';
fw <= '0';
rw <= '0';
elsif k = 1550000 then
k := 0;
end if;


elsif store = x"52" then --- Right R
i := 0;
j := 0;
k := 0;
m := 0;
n := 0;
p := 0;
q := 0;
l := l + 1;
if l <= 1005000 then
right <= '0';
left <= '0';
fw <= '0';
rw <= '0';
elsif l > 1005000 and l < 1550000 then
right <= '1';
left <= '0';
fw <= '0';
rw <= '0';
elsif l = 1550000 then
l := 0;
end if;


elsif store = x"49" then --Forward Right I
i := 0;
j := 0;
k := 0;
l := 0;
n := 0;
p := 0;
q := 0;
m := m + 1;
if m <= 1005000 then
right <= '0';
left <= '0';
fw <= '0';
rw <= '0';
elsif m > 1005000 and m < 1550000 then
right <= '1';
left <= '0';
fw <= '1';
rw <= '0';
elsif m = 1550000 then
m := 0;
end if;

elsif store = x"47" then ----- Forword left G
i := 0;
j := 0;
k := 0;
l := 0;
m := 0;
p := 0;
q := 0;
n := n + 1;
if n <= 1005000 then
right <= '0';
left <= '0';
fw <= '0';
rw <= '0';
elsif n > 1005000 and n < 1550000 then
right <= '0';
left <= '1';
fw <= '1';
rw <= '0';
elsif n = 1550000 then
n := 0;
end if;

elsif store = x"4a" then ---- Backward Right J
i := 0;
j := 0;
k := 0;
l := 0;
m := 0;
n := 0;
q := 0;
p := p + 1;
if p <= 1005000 then
right <= '0';
left <= '0';
fw <= '0';
rw <= '0';
elsif p > 1005000 and p < 1550000 then
right <= '1';
left <= '0';
fw <= '0';
rw <= '1';
elsif p = 1550000 then
p := 0;
end if;

elsif store = x"48" then -----Backward left H
i := 0;
j := 0;
k := 0;
l := 0;
m := 0;
n := 0;
p := 0;
q := q + 1;
if q <= 1005000 then
right <= '0';
left <= '0';
fw <= '0';
rw <= '0';
elsif q > 1005000 and q < 1550000 then
right <= '0';
left <= '1';
fw <= '0';
rw <= '1';
elsif q = 1550000 then
q := 0;
end if;

elsif store = x"53" then
fw <= '0';
rw <= '0';
right <= '0';
left <= '0';
else
null;
end if;
end if;


end process kalika1;

A_p <= x"FF" when (fw = '1' and rw = '0' ) else
x"00" when (fw = '0' and rw = '1' ) else
x"FF" when (right = '1' and left = '0' ) else
x"00" when (right = '0' and left = '1' ) else
x"FF" when (fw = '1' and rw = '0' and right = '1' and left = '0') else
x"80" when (fw = '1' and rw = '0' and right = '0' and left = '1') else
x"00" when (fw = '0' and rw = '1' and right = '1' and left = '0') else
x"00" when (fw = '0' and rw = '1' and right = '0' and left = '1') else
x"00";

B_p <= x"FF" when (fw = '1' and rw = '0' ) else
x"00" when (fw = '0' and rw = '1' ) else
x"00" when (right = '1' and left = '0' ) else
x"FF" when (right = '0' and left = '1' ) else
x"80" when (fw = '1' and rw = '0' and right = '1' and left = '0') else
x"FF" when (fw = '1' and rw = '0' and right = '0' and left = '1') else
x"00" when (fw = '0' and rw = '1' and right = '1' and left = '0') else
x"00" when (fw = '0' and rw = '1' and right = '0' and left = '1') else
x"00";

A_n <= x"00" when (fw = '1' and rw = '0' ) else
x"FF" when (fw = '0' and rw = '1' ) else
x"00" when (right = '1' and left = '0' ) else
x"00" when (right = '0' and left = '1' ) else
x"00" when (fw = '1' and rw = '0' and right = '1' and left = '0') else
x"00" when (fw = '1' and rw = '0' and right = '0' and left = '1') else
x"FF" when (fw = '0' and rw = '1' and right = '1' and left = '0') else
x"80" when (fw = '0' and rw = '1' and right = '0' and left = '1') else
x"00";

B_n <= x"00" when (fw = '1' and rw = '0' ) else
x"FF" when (fw = '0' and rw = '1' ) else
x"00" when (right = '1' and left = '0' ) else
x"00" when (right = '0' and left = '1' ) else
x"00" when (fw = '1' and rw = '0' and right = '1' and left = '0') else
x"00" when (fw = '1' and rw = '0' and right = '0' and left = '1') else
x"80" when (fw = '0' and rw = '1' and right = '1' and left = '0') else
x"FF" when (fw = '0' and rw = '1' and right = '0' and left = '1') else
x"00";


end Behavioral;

 

Here is my code. Actually, my code has no warning and error now. But, there is some issue to get exact 3.3 Volt output on fpga pins(First_A,First_B,Second_A,Second_B). Just one of 4 pins has 3.3 V, the others have 1.1V. I cannot understand this issue. 

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2 Replies
Adventurer
Adventurer
915 Views
Registered: ‎10-26-2017

Re: Connection between receiving data to transmitting one

Jump to solution

Hello,

 

I am not sure I understand exactly what you are trying to do. Are you trying to accomplish serial communication with the dc motor control chip, via a 4-input SPI bus? Any extra info you can share (drawing, block diagram, FPGA device/board, dc motor control chip part #) would help us to understand your situation better.

 

Dan

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Highlighted
Observer los_galacticos
Observer
1,198 Views
Registered: ‎02-17-2018

Re: Connection between receiving data to transmitting one

Jump to solution

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;

 

entity top_module is

Port (
reset : in STD_LOGIC;
clk : in STD_LOGIC;
din : in STD_LOGIC;
First_A : out STD_LOGIC;
Second_A : out STD_LOGIC;
First_B : out STD_LOGIC;
Second_B : out STD_LOGIC
);

end top_module;

architecture Behavioral of top_module is

 

component sub_mod1
port
(
clk, reset : in std_logic;
desiredDuty : in std_logic_vector(7 downto 0);
pwm_out : out std_logic
);
end component;

component sub_mod2
port
(
clk, reset : in std_logic;
desiredDuty : in std_logic_vector(7 downto 0);
pwm_out : out std_logic
);
end component;

component sub_mod3
port
(
clk, reset : in std_logic;
desiredDuty : in std_logic_vector(7 downto 0);
pwm_out : out std_logic
);
end component;

component sub_mod4
port
(
clk, reset : in std_logic;
desiredDuty : in std_logic_vector(7 downto 0);
pwm_out : out std_logic
);
end component;

 


type state is (ready,start1);
signal ps1 : state := ready;
signal start :std_logic;
signal store :std_logic_vector(7 downto 0) := "00000000";
signal A_p,B_p,A_n,B_n : std_logic_vector(7 downto 0);
signal fw,rw,right,left :std_logic;

 

begin

uut1: sub_mod1

port map(clk=>clk,reset => reset, desiredDuty=>A_p, pwm_out=>First_A);

uut2: sub_mod2

port map(clk=>clk,reset => reset, desiredDuty=>A_n, pwm_out=>Second_A);

uut3: sub_mod3

port map(clk=>clk,reset => reset, desiredDuty=>B_p, pwm_out=>First_B);

uut4: sub_mod4

port map(clk=>clk,reset => reset, desiredDuty=>B_n, pwm_out=>Second_B);

kalika0: process(clk)
variable i : integer := 0;
begin
if clk'event and clk = '1' then

if ps1 = ready then
start <= din;
end if;
----------------start bit detect logic-----------------
if start = '0' then
ps1 <= start1;
else
ps1 <= ready;
end if;

---------------------16xbaudrate sampling method---------------------------
if ps1 = start1 then
i := i + 1;

if i = 2600 then
start <= din;
end if;

if i = 7800 then
store(0) <= din;
end if;

if i = 13000 then
store(1) <= din;
end if;

if i = 18200 then
store(2) <= din;
end if;

if i = 23400 then
store(3) <= din;
end if;

if i = 28600 then
store(4) <= din;
end if;

if i = 33800 then
store(5) <= din;
end if;

if i = 39000 then
store(6) <= din;
end if;

if i = 44200 then
store(7) <= din;
end if;


if i = 54600 then
i := 0;
ps1 <= ready;
end if;
end if;
end if;
end process kalika0;
--dout <= store(7 downto 0);

kalika1: process(clk,reset,store)
variable i,j,k,l,m,n,p,q : integer := 0;
begin
if reset='1' then
fw <= '0';
rw <= '0';
right <= '0';
left <= '0';

elsif rising_edge(clk) then

if store = x"46" then --- forward F
j := 0;
k := 0;
l := 0;
m := 0;
n := 0;
p := 0;
q := 0;
i := i + 1;
if i <= 1005000 then
fw <= '0';
rw <= '0';
right <= '0';
left <= '0';
elsif i > 1005000 and i < 1550000 then
fw <= '1';
rw <= '0';
right <= '0';
left <= '0';
elsif i = 1550000 then
i := 0;
end if;


elsif store = x"42" then ---backward B
i := 0;
k := 0;
l := 0;
m := 0;
n := 0;
p := 0;
q := 0;
j := j + 1;
if j <= 1005000 then
fw <= '0';
rw <= '0';
right <= '0';
left <= '0';
elsif j > 1005000 and j < 1550000 then
fw <= '0';
rw <= '1';
right <= '0';
left <= '0';
elsif i = 1550000 then
j := 0;
end if;


elsif store = x"4C" then ---- left L
i := 0;
j := 0;
l := 0;
m := 0;
n := 0;
p := 0;
q := 0;
k := k + 1;
if k <= 1005000 then
right <= '0';
left <= '0';
fw <= '0';
rw <= '0';
elsif k > 1005000 and k < 1550000 then
right <= '0';
left <= '1';
fw <= '0';
rw <= '0';
elsif k = 1550000 then
k := 0;
end if;


elsif store = x"52" then --- Right R
i := 0;
j := 0;
k := 0;
m := 0;
n := 0;
p := 0;
q := 0;
l := l + 1;
if l <= 1005000 then
right <= '0';
left <= '0';
fw <= '0';
rw <= '0';
elsif l > 1005000 and l < 1550000 then
right <= '1';
left <= '0';
fw <= '0';
rw <= '0';
elsif l = 1550000 then
l := 0;
end if;


elsif store = x"49" then --Forward Right I
i := 0;
j := 0;
k := 0;
l := 0;
n := 0;
p := 0;
q := 0;
m := m + 1;
if m <= 1005000 then
right <= '0';
left <= '0';
fw <= '0';
rw <= '0';
elsif m > 1005000 and m < 1550000 then
right <= '1';
left <= '0';
fw <= '1';
rw <= '0';
elsif m = 1550000 then
m := 0;
end if;

elsif store = x"47" then ----- Forword left G
i := 0;
j := 0;
k := 0;
l := 0;
m := 0;
p := 0;
q := 0;
n := n + 1;
if n <= 1005000 then
right <= '0';
left <= '0';
fw <= '0';
rw <= '0';
elsif n > 1005000 and n < 1550000 then
right <= '0';
left <= '1';
fw <= '1';
rw <= '0';
elsif n = 1550000 then
n := 0;
end if;

elsif store = x"4a" then ---- Backward Right J
i := 0;
j := 0;
k := 0;
l := 0;
m := 0;
n := 0;
q := 0;
p := p + 1;
if p <= 1005000 then
right <= '0';
left <= '0';
fw <= '0';
rw <= '0';
elsif p > 1005000 and p < 1550000 then
right <= '1';
left <= '0';
fw <= '0';
rw <= '1';
elsif p = 1550000 then
p := 0;
end if;

elsif store = x"48" then -----Backward left H
i := 0;
j := 0;
k := 0;
l := 0;
m := 0;
n := 0;
p := 0;
q := q + 1;
if q <= 1005000 then
right <= '0';
left <= '0';
fw <= '0';
rw <= '0';
elsif q > 1005000 and q < 1550000 then
right <= '0';
left <= '1';
fw <= '0';
rw <= '1';
elsif q = 1550000 then
q := 0;
end if;

elsif store = x"53" then
fw <= '0';
rw <= '0';
right <= '0';
left <= '0';
else
null;
end if;
end if;


end process kalika1;

A_p <= x"FF" when (fw = '1' and rw = '0' ) else
x"00" when (fw = '0' and rw = '1' ) else
x"FF" when (right = '1' and left = '0' ) else
x"00" when (right = '0' and left = '1' ) else
x"FF" when (fw = '1' and rw = '0' and right = '1' and left = '0') else
x"80" when (fw = '1' and rw = '0' and right = '0' and left = '1') else
x"00" when (fw = '0' and rw = '1' and right = '1' and left = '0') else
x"00" when (fw = '0' and rw = '1' and right = '0' and left = '1') else
x"00";

B_p <= x"FF" when (fw = '1' and rw = '0' ) else
x"00" when (fw = '0' and rw = '1' ) else
x"00" when (right = '1' and left = '0' ) else
x"FF" when (right = '0' and left = '1' ) else
x"80" when (fw = '1' and rw = '0' and right = '1' and left = '0') else
x"FF" when (fw = '1' and rw = '0' and right = '0' and left = '1') else
x"00" when (fw = '0' and rw = '1' and right = '1' and left = '0') else
x"00" when (fw = '0' and rw = '1' and right = '0' and left = '1') else
x"00";

A_n <= x"00" when (fw = '1' and rw = '0' ) else
x"FF" when (fw = '0' and rw = '1' ) else
x"00" when (right = '1' and left = '0' ) else
x"00" when (right = '0' and left = '1' ) else
x"00" when (fw = '1' and rw = '0' and right = '1' and left = '0') else
x"00" when (fw = '1' and rw = '0' and right = '0' and left = '1') else
x"FF" when (fw = '0' and rw = '1' and right = '1' and left = '0') else
x"80" when (fw = '0' and rw = '1' and right = '0' and left = '1') else
x"00";

B_n <= x"00" when (fw = '1' and rw = '0' ) else
x"FF" when (fw = '0' and rw = '1' ) else
x"00" when (right = '1' and left = '0' ) else
x"00" when (right = '0' and left = '1' ) else
x"00" when (fw = '1' and rw = '0' and right = '1' and left = '0') else
x"00" when (fw = '1' and rw = '0' and right = '0' and left = '1') else
x"80" when (fw = '0' and rw = '1' and right = '1' and left = '0') else
x"FF" when (fw = '0' and rw = '1' and right = '0' and left = '1') else
x"00";


end Behavioral;

 

Here is my code. Actually, my code has no warning and error now. But, there is some issue to get exact 3.3 Volt output on fpga pins(First_A,First_B,Second_A,Second_B). Just one of 4 pins has 3.3 V, the others have 1.1V. I cannot understand this issue. 

0 Kudos