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shubhamc
Participant
Participant
693 Views
Registered: ‎01-28-2019

Design works in simulation but not on hardware

Hi all,

I am working on a vivado project in which I have Xilinx's IPs and also some of my HLS generated IPs and has ILA to observe the results. When I go for simulations , design produces desired result but when it comes to run on board it does not produce the same result. Here what I've observed in ILA is that before the desired data some garbage data comes on the data bus and I do not have any idea why is it happening.

Any suggestions would be very helpful.

Regards

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7 Replies
bruce_karaffa
Scholar
Scholar
668 Views
Registered: ‎06-21-2017

The first question will always be do you have the proper timing constraints for this design and does the design meet these constraints?

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dgisselq
Scholar
Scholar
646 Views
Registered: ‎05-21-2015

@shubhamc,

At one time I tried to catalog all the reasons why a design might work in simulation but not in hardware.  I probably missed some, but perhaps the list will give you a place to start.

Dan

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viviany
Xilinx Employee
Xilinx Employee
539 Views
Registered: ‎05-14-2008

What do those garbage data look like?

Can you paste a screenshot of the ILA waveform?

-vivian

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shubhamc
Participant
Participant
486 Views
Registered: ‎01-28-2019

Hi @bruce_karaffa 

All timing constraints are met in the design.

 

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shubhamc
Participant
Participant
483 Views
Registered: ‎01-28-2019

Hi @dgisselq 

Thanks you for sharing this. I will look into it for the solution.

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shubhamc
Participant
Participant
481 Views
Registered: ‎01-28-2019

Hi @viviany 

Right now I do not have snapshot of ILA but I will share it with you but till then I can tell you that by garbage I meant to say undesired data.

Let's say we have 128 bit bus then in the starting for 3 or 4 buses thar undesired data appears and only after that the desired data comes on the bus of 128 bits.

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Robiwan3
Observer
Observer
466 Views
Registered: ‎07-03-2020

Do your post-synthesis simulation results match your pre-synthesis simulation results?

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