05-25-2016 12:50 AM
Hi,
I am using Kintex-7 KC705 board. In my design I hThen How can I use the differential clock source of FPGA. Can I directly connect the sys_clk_p to my deisgn clock?? Or I have to convert the differential clock to single ended clock?? Thanks in advance. :)
Regards,
Sourajit
05-25-2016 01:44 AM - edited 05-25-2016 01:46 AM
yes you can convert differential clock to single ended in the fpga by using IBUFDS
check for libararies guide in the following link for the usage of Ibufds
http://www.xilinx.com/support/documentation/sw_manuals/xilinx14_7/7series_hdl.pdf
05-25-2016 01:48 AM
Yes I saw that. But I want to know whether the sys_clk_p will work or we must have to use IBUFDS?
05-25-2016 02:11 AM
Yes it is recommended to use IBUFDS