12-17-2013 08:43 AM
I am currently workiing on porting an rtl design to an ARTIX-7 Board.
When running the route_design option with -no_timing_driven it will turn off the routing algorithm to ignore constraints. Does this necessarily mean that the design can no meet timing constraints? Or to meet timing constraints do you have to run route_design without the option.
This seems a little ambiquous to me.
12-17-2013 09:05 AM - edited 12-17-2013 09:07 AM
If you select no timing driven then it will ignore timing driven routing. So it does not mean that design cannot meet timing.
Vivado is a timing driven tool. Due to the issue Vivado 2013.3 please follow the below tcl commands after synthesis.
After route design you can run check_timing to check the timing results.
After two days you can use 2013.4 as it will be released without the use of TCL command.
12-17-2013 10:12 AM - edited 12-17-2013 10:13 AM
you have to perform above steps after synthesis.
For implementation you must run
You can ignore phy_opt_design if you want.
12-17-2013 09:01 PM