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kkandoi
Adventurer
Adventurer
11,295 Views
Registered: ‎06-27-2013

Timing error in Virtex4Lx100-10 using ISE

Getting the following error in my Project . I am using DCM_BASE in LOW freq mode

CLKin = 74.07 ns

CLKFX = 37.03 ns

CLKFB connected to CLK0 using BUFG and CLKIN connected thru IBUFG to CLKIN of DCM..

 

Please help me on this..

 

Regards

Kaps

 

Component Switching Limit Checks: TS_clk_decoder_in = PERIOD TIMEGRP "clk_decoder_in" 74.07 ns HIGH 50%;

 -------------------------------------------------------------------------------- 
 Slack: -21.437ns (max period limit - period) 
   Period: 74.070ns 
   Max period limit: 52.633ns (18.999MHz) (Tdcmpc) 
   Physical resource: XLXI_65/CLKIN 
   Logical resource: XLXI_65/CLKIN 
   Location pin: DCM_ADV_X0Y10.CLKIN 
   Clock network: XLXN_625 
 -------------------------------------------------------------------------------- 
 Slack: -21.437ns (max period limit - period) 
   Period: 74.070ns 
   Max period limit: 52.633ns (18.999MHz) (Tdcmpco) 
   Physical resource: XLXI_65/CLK0 
   Logical resource: XLXI_65/CLK0 
   Location pin: DCM_ADV_X0Y10.CLK0 
   Clock network: XLXN_627 

 

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2 Replies
arpansur
Moderator
Moderator
9,426 Views
Registered: ‎07-01-2015

Hi @kkandoi,

 

Please go through the following link and see if it helps.

http://www.xilinx.com/support/answers/32109.html

 

Thanks,
Arpan

 

Thanks,
Arpan
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avrumw
Expert
Expert
9,401 Views
Registered: ‎01-23-2009

The max period limit check is telling you that your input clock is too slow for use in a DCM. Looking at the Virtex-4 datasheet (which isn't easy to find), look at table 46 (Operating Frequency Ranges for DCM in Maximum Range (MR) Mode), you will see that the minimum input frequency is 19MHz. Your 13.5MHz input clock is below this range, and hence is illegal...

 

In some modes, (i.e. CLKFX only mode), the minimum input frequency is lower (1MHz) - depending on what functions you need from the DCM, this may or may not work for you...

 

If you only need CLKFX, I think you need to leave CLKFBIN unconnected - by using the CLK0 output for feedbackyou are putting the DCM in "DLL mode", which makes the minimum input 19MHz.

 

Avrum