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9,205 Views
Registered: ‎11-03-2013

What is cross clock domain?

In my automatically generated I find this line:

####### No cross clock domain analysis. Domains are not related ##############
#TIMESPEC "TS_TIG1" = FROM "INIT_CLK" TO "USER_CLK" TIG;

Please explain me whats this?

Regards,

jeevanreddymandali
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Xilinx Employee
Xilinx Employee
9,193 Views
Registered: ‎09-20-2012

Re: What is cross clock domain?

Hi,

As the name indicates, cross clock domain refers to paths from one clock domain to other clock domain.

In ISE, analysis is done on related clock domains by default (input clock to mmcm/dcm and its output clocks are related). If you want to constrain unrelated cross clock domains you need to use FROM TO constraints.

Refer to UG612 for more details.

Thanks,
Deepika.
Thanks,
Deepika.
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Teacher muzaffer
Teacher
9,172 Views
Registered: ‎03-31-2012

Re: What is cross clock domain?

cross clock refers to paths where the target register's clock is different than that of the source register. This is important because there are cases where the two clocks are in question maybe coming from different clock sources so the ratio of the two periods may not be rational which makes it impossible to time the path in the synchronous sense so special clock domain crossing techniques have to be applied.
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