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Participant wanqingxilinx
Participant
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Registered: ‎01-22-2008

Why does report_cdc give the same path twice in CDC Details? Sorting of "Source (From)" Field does not work.

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Why does report_cdc give the same path twice in CDC Details? When I sort the Source (From) filed, the same Source (From) values do not get sorted. See picutre below for what I mean:

image.png

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Guide avrumw
Guide
547 Views
Registered: ‎01-23-2009

Re: Why does report_cdc give the same path twice in CDC Details? Sorting of "Source (From)" Field does not work.

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So they look like the same path, but they aren't...

If you look at the "Source Clock" you will see that a different clock is used for the two different reports - clk_125mhz_Gen and clk_250mhz_Gen. Most likely this means that the startpoint is clocked by a multiplexed clock - there is a MUX (presumably BUFGMUX) upstream of the source flip-flop. From the names involved, this looks like it starts in the PCIe module, and this is expected; the USERCLK is a MUX of a 125MHz of 250MHz clock depending on the negotiated PCIe link speed (2.5Gbps or 5Gbps).

When you have a MUXed clock, all flip-flops connected to that clock are (from a static timing point of view) duplicated; the FF is analyzed as if it is two FFs - one on one clock and one on the other.

It gets worse... If both your startpoint and endpoint are driven by the same MUXed clock, then you end up with four paths:

  • srcFF on clkA to dstFF on clkA
  • srcFF on clkA to dstFF on clkB
  • srcFF on clkB to dstFF on clkA
  • srcFF on clkB to dstFF on clkB

Clearly two of these are impossible - the MUX either selects clkA or clkB - you can't use both "simultaneously". This is a good (and possibly the only good) use of the set_clock_groups command - to tell the tool that clkA and clkB are physically exclusive (as long as they only go to the BUFGMUX - which isn't the case in the PCIe).

I won't go into the methodology of constraining clocks that both go through and around clock MUXes - it's complicated and, in this case, the PCIe's scoped constraints deal with them properly. However, this is the reason you are seeing these two failures - one from clk125 and one from clk250.

Avrum

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Guide avrumw
Guide
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Registered: ‎01-23-2009

Re: Why does report_cdc give the same path twice in CDC Details? Sorting of "Source (From)" Field does not work.

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So they look like the same path, but they aren't...

If you look at the "Source Clock" you will see that a different clock is used for the two different reports - clk_125mhz_Gen and clk_250mhz_Gen. Most likely this means that the startpoint is clocked by a multiplexed clock - there is a MUX (presumably BUFGMUX) upstream of the source flip-flop. From the names involved, this looks like it starts in the PCIe module, and this is expected; the USERCLK is a MUX of a 125MHz of 250MHz clock depending on the negotiated PCIe link speed (2.5Gbps or 5Gbps).

When you have a MUXed clock, all flip-flops connected to that clock are (from a static timing point of view) duplicated; the FF is analyzed as if it is two FFs - one on one clock and one on the other.

It gets worse... If both your startpoint and endpoint are driven by the same MUXed clock, then you end up with four paths:

  • srcFF on clkA to dstFF on clkA
  • srcFF on clkA to dstFF on clkB
  • srcFF on clkB to dstFF on clkA
  • srcFF on clkB to dstFF on clkB

Clearly two of these are impossible - the MUX either selects clkA or clkB - you can't use both "simultaneously". This is a good (and possibly the only good) use of the set_clock_groups command - to tell the tool that clkA and clkB are physically exclusive (as long as they only go to the BUFGMUX - which isn't the case in the PCIe).

I won't go into the methodology of constraining clocks that both go through and around clock MUXes - it's complicated and, in this case, the PCIe's scoped constraints deal with them properly. However, this is the reason you are seeing these two failures - one from clk125 and one from clk250.

Avrum

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Participant wanqingxilinx
Participant
538 Views
Registered: ‎01-22-2008

Re: Why does report_cdc give the same path twice in CDC Details? Sorting of "Source (From)" Field does not work.

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Thanks @avrumw

Here are the schematics of the two clock sources for USERCLK. I wonder how this explains why they are from 2 different sources.

Source Clock for Path 1:

image.png

 

Source Clock for Path 2:

image.png

Since report_cdc says both are CDC-1 paths (1-bit unknown CDC circuity), I think I need to add a 1-bit CDC synrhonizer. I am thinking of using xpm_cdc_single module as the synthronizer. However, that module needs the src_clk as its input and I do not have access to the source clock. How do I handle this?

Forget about what I say about "Sorting of "Source (From)" Field does not work.". I should have sorted the "Destionaton (To)" field to see if the sorting works.

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Guide avrumw
Guide
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Registered: ‎01-23-2009

Re: Why does report_cdc give the same path twice in CDC Details? Sorting of "Source (From)" Field does not work.

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I am not sure about the schematics you generated. For one of the two paths, the clock should come from another output of the MMCM (CLKOUT1) and go through the I1 input of the BUFGMUX.

I can't comment on the sorting of paths in the report_cdc command.

As for the "appropriate" synchronizer for this path, I can't say. The requirements on the synchronizer depend on what kind of data is going through the synchronizer - how wide it is, how often it toggles, what the other side does with it, etc... There is no "one size fits all" for clock domain crossing circuits.

Avrum

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Participant wanqingxilinx
Participant
520 Views
Registered: ‎01-22-2008

Re: Why does report_cdc give the same path twice in CDC Details? Sorting of "Source (From)" Field does not work.

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Hi @avrumw 

When I expand the I1 input, I see it is connected to the CLKOUT1 of MMCM ouput. So, yes, you are right, they are indeed 2 different paths. I generated the schematics by selecting the path first and then press F4 key. It would be nice if the default schmatics generted this way shows both the I0 and I1 connecting to CLKOUT0 and CLKOUT1, I would have seen the 2 paths then.

Also thanks for the answer on the synchronizer.  In my case, the signal from this PCIe block is an almost static signal : user_link_up (in 125MHz, 250MHz domains). I am trying to pass this signal to an 100MHz clock domain. Do I need a synchronizer here? If I need one, I am thinking of using one that does not need a source clock. I wish to see an xpm_cdc_* synchronizer that does not need a source clock. I understand that there is no "one size fits all" synchronizers. I wish I can always find an xpm_cdc_* synchronizer for my case. Thanks very much for your help!

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Guide avrumw
Guide
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Registered: ‎01-23-2009

Re: Why does report_cdc give the same path twice in CDC Details? Sorting of "Source (From)" Field does not work.

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Any time you bring signals across asynchronous clock domains you need a CDC. Since this signal is a slow changing one bit signal, a simple synchronizer is sufficient. You can easily implement one without an XPM - just put two (or three) back to back flip-flops running on the destination domain with the ASYNC_REG property set.

You can use the XPM_CDC_SINGLE. While it does have a src_clk port, you can tie this off if you set the attribute SRC_INPUT_REG=0 (the input register is optional and isn't necessary in your case).

Avrum

Participant wanqingxilinx
Participant
459 Views
Registered: ‎01-22-2008

Re: Why does report_cdc give the same path twice in CDC Details? Sorting of "Source (From)" Field does not work.

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>> You can use the XPM_CDC_SINGLE. While it does have a src_clk port, you can tie this off if you set the attribute SRC_INPUT_REG=0 (the input register is optional and isn't necessary in your case).

Thanks @avrumw very much. This is the exact solution I am looking for.

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