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Scholar ronnywebers
Scholar
7,914 Views
Registered: ‎10-10-2014

determine maximum frequency at which a circuit can run

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A long time ago, I used some well-known competitor's software. It had a nice feature called 'registered performance' analyser, which gave the maximum frequency at which a design could run.

 

During development of hld code, this was an easy indicator to see if at some point you wrote a construct that generated too much logic to be fast, and/or needed some pipelining register.

 

Is there a similar tool / utility / report in Vivado that I can use for this purpose, let's say during development of a custom IP? 

 

If not, should I add a constraint duruing development of my AXI4-Lite custom IP that for example sets my axi-clock to a frequency of let's say 150MHz, to make sure that it can make this frequency? Otherwise I would only know this when I'm integrating this in a larger design much later on.

** kudo if the answer was helpful. Accept as solution if your question is answered **
1 Solution

Accepted Solutions
Moderator
Moderator
14,244 Views
Registered: ‎07-01-2015

Re: determine maximum frequency at which a circuit can run

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Hi @ronnywebers,

 

The maximum frequency value of a clock signal is not given explicitly in timing report for Vivado. 

But you can use following equation to calculate the max. frequency of the design

 

Fmax=1/(Actual period - WNS)

 

 

Kindly Nonte- Here WNS used is the worst negative slack of the clock signal in the Intra-Clock Paths section.

Thanks,
Arpan
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2 Replies
Moderator
Moderator
14,245 Views
Registered: ‎07-01-2015

Re: determine maximum frequency at which a circuit can run

Jump to solution

Hi @ronnywebers,

 

The maximum frequency value of a clock signal is not given explicitly in timing report for Vivado. 

But you can use following equation to calculate the max. frequency of the design

 

Fmax=1/(Actual period - WNS)

 

 

Kindly Nonte- Here WNS used is the worst negative slack of the clock signal in the Intra-Clock Paths section.

Thanks,
Arpan
----------------------------------------------------------------------------------------------
Kindly note- Please mark the Answer as "Accept as solution" if information provided is helpful.

Give Kudos to a post which you think is helpful and reply oriented.
----------------------------------------------------------------------------------------------
Moderator
Moderator
7,896 Views
Registered: ‎01-16-2013

Re: determine maximum frequency at which a circuit can run

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Hi,

 

As Arpan said there is no way to find out the max frequency for any specific design using Xilinx tools specifically Vivado.

as you mentioned that 150MHz looks decent and design should work.

 

Let me give you some brief about how it works. If you specify the constraint for 150MHz tool try to pack and route the logic to satisfy the 150MHz requirement. Suppose if you face any violations there are ways to meet by floorplanning/pipelining etc.

 

If the timing has met after implementation for your design then you can consider that should work on hardware too.

If there are any paths which requires relax timing requirement please specify so tool will put less efforts on placement and routing on those paths and focus more on critical path requirements.

 

Also you can explore options from implementation to meet timing and required frequency.

 

Thanks,
Yash