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Voyager
Voyager
88 Views
Registered: ‎10-12-2016

vivado timing constraint for synchronus clocks with frequency 30 and 48 Mhz ?

Hi Friends, 

I have timing path between the following clocks.

1) CLK30M-> CLK48M

2) CLK60M-> CLK48M

3) CLK48M-> CLK60M

How to constraint these synchronus clocks.

These all 30,48,60M are generating from the same MMCM. 

Any suggestions or help is highly appreciated. 

Thank You 

S Sampath Reddy

 

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1 Reply
Explorer
Explorer
74 Views
Registered: ‎07-18-2018

Re: vivado timing constraint for synchronus clocks with frequency 30 and 48 Mhz ?

@ssampath,

   How are you crossing between them, and what kind of path?

The tool by default will treat them as synchronus and provide timing information if setup/hold is met, but that's unlikely helpful because that doesn't tell you it will work, and how it should be crossed depends what you are doing.

The most common soultion is a synchronizer for the crossing. If that's what you are doing, and it makes sense for your design, make sure you put an ASYNC reg property to keep the FF pair as close as possible.

But what to do for constraining depends a lot on what kind of signals are crossing, and how you implemented to crossing.

 

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