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Voyager
Voyager
873 Views
Registered: ‎10-12-2016

what is the use of create_generated_clock ?

 Hi Friends, 

I took a small design and i use user clock divider logic with create_generate_clock and without create_generated_clock,  i did not see any difference in the routing state and placement. in both cases vivado using BUFG after my user logic. 

Then what is the use of this create_generated-clock  ? 

when it will useful exactly ? 

 

NOTE: Any help or suggestions are highly appreciated. 

 

Thank You 

S Sampath 

 

-Sampath
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Moderator
Moderator
865 Views
Registered: ‎11-04-2010

Hi, @ssampath, You will see different startpoints of the clock when you use create_generated_clock or create_clock. For the internal start pin, I suggest you use create_generated_clock.
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Voyager
Voyager
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Registered: ‎10-12-2016

Hi @hongh,

Thank you,

what do you mean by stat points ? Can you pls elaborate more clearly ?

In my case experiment in both case routing happened same. anyway i will check it again. 

Thank You 

S Sampath

-Sampath
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Explorer
Explorer
841 Views
Registered: ‎06-09-2018

Hi @ssampath

answers to <this link> perhaps be useful...

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Moderator
Moderator
806 Views
Registered: ‎11-04-2010

Hi, @ssampath ,

Please check the 2 clock paths in your own example.

Assuming:

Clock Port -> BUFG -> MMCM -> clkou1:

To create clock for MMCM's clkou1 pin: 

1. If you use create_clock on MMCM's clkou1 pin, the clock path will start from pin MMCM/clkou1 

2. If you check let tool derive clock for MMCM's clkou1 pin (Create_generated_clock), the clock path will start from the "Clock Port", which is the port for its master clock.

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Moderator
Moderator
759 Views
Registered: ‎01-16-2013

Hi,

Refer below AR

https://www.xilinx.com/support/answers/62488.html

 

Thanks,
Yash

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