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Adventurer
Adventurer
9,255 Views
Registered: ‎04-02-2010

Ultrascale internal vfer pin grounding

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In the DDR4 Pin Rules section, the Memory Interface Solutions Product Guide (PG150) states that when internal Vref is used, the Vref pins should be tied to ground with the resistor value specified in the SelectIO User Guide (UG571).  Looking in UG571, I see no reference to a resistor value.  It just states that the Vref pins should be tied to ground when internal Vref is used.

 

Is a direct connection to ground acceptable for this or is a resistor of some type required?

 

Thanks.

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Xilinx Employee
Xilinx Employee
16,731 Views
Registered: ‎07-11-2011

Re: Ultrascale internal vfer pin grounding

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Hi,

 

Resistor is just required  to have stable ground, you can use 500 ohms as specified in below link

http://www.xilinx.com/support/answers/60322.html

 

Hope this helps

 

-Vanitha

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2 Replies
Xilinx Employee
Xilinx Employee
16,732 Views
Registered: ‎07-11-2011

Re: Ultrascale internal vfer pin grounding

Jump to solution

Hi,

 

Resistor is just required  to have stable ground, you can use 500 ohms as specified in below link

http://www.xilinx.com/support/answers/60322.html

 

Hope this helps

 

-Vanitha

---------------------------------------------------------------------------------------------
Please do google search before posting, you may find relavant information.
Mark the post - "Accept as solution" and give kudos if information provided is helpful and reply oriented
Xilinx Employee
Xilinx Employee
9,238 Views
Registered: ‎08-01-2012

Re: Ultrascale internal vfer pin grounding

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FYI: The main rules for using INTERNAL_VREF are listed below:

 

---One value of VREF can be set for the bank.

---INTERNAL_VREF can only be set to the nominal reference voltage value of a given I/O standard.

---Valid settings of INTERNAL_VREF are listed. Not all values are supported in all types of banks:

  1.  

    0.60

    0.675

    0.70

    0.75

    0.84

    0.90

  2.  

    ---VREF is a dedicated pin and cannot be used as a normal I/O pin even when INTERNAL_VREF is used.

---Internal VREF (INTERNAL_VREF and VREF scan) cannot be combined with external VREF usage within a bank.

---If an external VREF is not used, the VREF pins must be pulled to ground by a resister

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