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Visitor
Visitor
545 Views
Registered: ‎03-30-2020

LVDS to CSI Converter Chip

Hi Team,

This is Madhusoodana Bairy from Mistral Solutions, Bangalore.
We are in need of 4 Lane or 2 Lane LVDS to CSI Converter Chip.
Whether the company supports this kind of chipset or any low end CPLDs/FPGAs which will do this job ?

Thanks.

Best Regards,
Madhusoodana Bairy

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4 Replies
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Moderator
Moderator
475 Views
Registered: ‎07-23-2015

@MadhuBairy Take a look at XAPP894: https://www.xilinx.com/support/documentation/application_notes/xapp894-d-phy-solutions.pdf

- Giri
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Visitor
Visitor
446 Views
Registered: ‎03-30-2020

Hi Giri,

Thanks for your response.

I am looking for a low-end CPLD/FPGA device.

Whether Xilinx supports any such low-end device or any other LVDS to CSI converters ?

Best Regards,

Madhu

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Xilinx Employee
Xilinx Employee
439 Views
Registered: ‎03-30-2016

Hello @MadhuBairy 

If you are planning to use Xilinx MIPI IP with cost-effective FPGA.
Spartan-7 is a good choice for cost-effective system.

Xilinx also has a development board to start with. Please see below
   https://www.xilinx.com/products/boards-and-kits/sp701.html
   https://www.xilinx.com/support/documentation/boards_and_kits/sp701/ug1319-sp701-eval-bd.pdf
We have a working MIPI example design using SP701. This example design should be a good place to start your MIPI design.


As pointed by Giri @gnarahar , if you are planning to use MIPI IP with 7-series device, you need to use an external components to convert LVDS to MIPI signals ( and vice versa). XAPP894 shares the concept of how to implement the external component.
For a cost-critical system with a typical MIPI D-PHY signal level, some users will opt to use an external resistor network. SP701 follow guideline from XAPP894 to implement this resistor network needed for signal converter. If you are going to build your own board, I would suggest doing board simulation with IO IBIS model to ensure that resistor network can be used to receive signal from your TX/sensor.
Please note that to achieve 1250Mbps with 7-series devices, external PHY device usage (i.e Meticom) is necessary.

If you need to achive a higher line-rate for MIPI, UltraScale+ device has this capability without using any external devices !

Regards
Leo

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Visitor
Visitor
415 Views
Registered: ‎03-30-2020

Hi Leo,

Thanks for your response and suggestions.

Best Regards,

Madhu

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