cancel
Showing results for 
Search instead for 
Did you mean: 
Highlighted
Observer
Observer
831 Views
Registered: ‎06-14-2012

Reading CNTVALUEOUT from IDELAYE3

Jump to solution

If I'm using IDELAYE3 primitive in the VARIABLE mode, can I still read the final tap value from CNTVALUEOUT port by setting EN_VTC pin low. Or does the CNTVALUEOUT port only work in VAR_LOAD mode?

Tags (1)
0 Kudos
1 Solution

Accepted Solutions
Highlighted
Moderator
Moderator
1,076 Views
Registered: ‎08-08-2017

Re: Reading CNTVALUEOUT from IDELAYE3

Jump to solution

Hi @legoman

 

Yes You can read the final value from CNTVALUEOUT[8:0]  on waiting for minimum of 5 clock cycles after increment of decrement the  delay line.

 

As you know in Variable mode the CE and INC pins are used to increment and decrement the delay line.  You need to follow below sequence from UG 571 [https://www.xilinx.com/support/documentation/user_guides/ug571-ultrascale-selectio.pdf]

 

variable.PNG

 

Here you can read CNTVALUEOUT port after step 4 to ensure that increment/ decrement is happening as expected.

 

-------------------------------------------------------------------------------------------------------------------------------------------------------

Please reply if you have any query, Give Kudo as Accepted as solution if you get the resolution of your queries.

------------------------------------------------------------------------------------------------------------------------------------------------------

 

 

-------------------------------------------------------------------------------------------------------------------------------
Reply if you have any queries, give kudos and accept as solution
-------------------------------------------------------------------------------------------------------------------------------

View solution in original post

1 Reply
Highlighted
Moderator
Moderator
1,077 Views
Registered: ‎08-08-2017

Re: Reading CNTVALUEOUT from IDELAYE3

Jump to solution

Hi @legoman

 

Yes You can read the final value from CNTVALUEOUT[8:0]  on waiting for minimum of 5 clock cycles after increment of decrement the  delay line.

 

As you know in Variable mode the CE and INC pins are used to increment and decrement the delay line.  You need to follow below sequence from UG 571 [https://www.xilinx.com/support/documentation/user_guides/ug571-ultrascale-selectio.pdf]

 

variable.PNG

 

Here you can read CNTVALUEOUT port after step 4 to ensure that increment/ decrement is happening as expected.

 

-------------------------------------------------------------------------------------------------------------------------------------------------------

Please reply if you have any query, Give Kudo as Accepted as solution if you get the resolution of your queries.

------------------------------------------------------------------------------------------------------------------------------------------------------

 

 

-------------------------------------------------------------------------------------------------------------------------------
Reply if you have any queries, give kudos and accept as solution
-------------------------------------------------------------------------------------------------------------------------------

View solution in original post