02-22-2019 02:48 AM
I am designing an expansion board for my ZCU102.
On this expansion board there are components which require 3.3V interfaces, but I see that all IOs connected to J4 and J5 are LVCMOS18.
Is it possible to change the standard for these pins?
Or do I have to insert level shifters in the breakout boards?
02-22-2019 03:12 PM
By looking at the ZCU102 schematic, I see that the HPC0 and HPC1 connectors (also called J5 and J4, respectively) are connected to the Banks 228/229 and 65.
Banks 228/229 (HPC0, J5) are MGT connections, so you can't use those.
Bank 65 (HPC1, J4) is a HP I/O Bank. Such banks can only be powered by a maximum of 1.8V. Therefore, you cannot input a 3.3V signal in it.
You'll need to have a level shifter if you want to connect those two boards.
02-23-2019 06:42 PM
Bank 66 is also a HP Bank, max 1.8V.
You would need to use a HR Bank, which can be powered up to 3.4V.
Looking at the document ZCU102 Evaluation Board User Guide - UG1182, pg. 74, there's the following mention:
"The ZCU102 evaluation board supports two PMOD GPIO headers J55 (right-angle female) and J87 (vertical male). The PMOD nets are wired to the XCZU9EG device U1 bank 47".
Bank 47 is a HD bank! In fact, Table 3-31 shows that all those PMOD pins are LVCMOS33.
I'm not sure if you can design your peripheral board to connect to that type of connections, but I think that would be your best shot.