cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 
Contributor
Contributor
513 Views
Registered: ‎05-18-2018

AXI VDMA configuration for accessing full DDR address space

Jump to solution

Hi,

I am reading AXI video stream input from camera and using VDMA (S2MM) storing it to DDR. With the same VDMA (MM2S), I am reading the data back from DDR and displaying it on monitor using HDMI. I am using the board ZC706. The VDMA is set to maximum 32 frame buffers. My image size is 640x480 (300Kb, gray image) at 60fps. VDMA stores data in cyclic buffer method. My VDMA address range I have set to 1GB.

I want to capture / write incoming video data for e.g. say 10 seconds i.e. 600 frames and then once captured, display it back on HDMI as a 10 second video. In short I want to capture a video and store it. VDMA however works in cyclic buffer format and overwrites the new frame buffer once it fills the last one. 

So can VDMA only be used for real time video processing or it can be configured to store data in entire memory range by changing the configuration on the go (setting new start location) after its buffers are full?

 

Regards,

Bhavin Lapasia

Tags (2)
0 Kudos
Reply
1 Solution

Accepted Solutions
Moderator
Moderator
483 Views
Registered: ‎10-04-2017

Hi @bhavinlapasia,

The VDMA was not developed with the intention of writing a full video to continuous memory space. I think that what you are trying to do would theoretically work, but it will be hard to know for sure without testing.

It will be important to update the new start location so that no frames are overwritten or skipped.

Regards,

Sam

Don't forget to reply, kudo, and accept as solution.

Xilinx Video Design Hub

View solution in original post

0 Kudos
Reply
2 Replies
Moderator
Moderator
484 Views
Registered: ‎10-04-2017

Hi @bhavinlapasia,

The VDMA was not developed with the intention of writing a full video to continuous memory space. I think that what you are trying to do would theoretically work, but it will be hard to know for sure without testing.

It will be important to update the new start location so that no frames are overwritten or skipped.

Regards,

Sam

Don't forget to reply, kudo, and accept as solution.

Xilinx Video Design Hub

View solution in original post

0 Kudos
Reply
Moderator
Moderator
440 Views
Registered: ‎11-09-2015

Hi @samk 

Is everything clear for you on this topic?

If your question is answered or your issue is solved, please kindly mark the response which helped as solution (click on "Accept as solution" button below the reply)

If this is not solved/answered, please reply in the topic giving more information on your current status.

Thanks and Regards,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
0 Kudos
Reply