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ackye
Contributor
Contributor
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Registered: ‎05-19-2020

Can 125m clock be deleted in hdmi2.0 4k60 design? We only drew one clk line from si5324

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Can 125m clock be deleted in hdmi2.0 4k60 design? We only drew one clk line from si5324

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xud
Xilinx Employee
Xilinx Employee
233 Views
Registered: ‎08-02-2007

@ackye 

125MHZ DRU clock is only used for low resolution, so if your design is only meant to support 4kp60, the answer is YES.

You can uncheck DRU clock in Video PHY IP GUI

xud_0-1619515009704.png

 

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watari
Professor
Professor
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Registered: ‎06-16-2013

Hi @ackye 

 

Would you explain more detail and/or share your block diagram ?

 

Best regards,

xud
Xilinx Employee
Xilinx Employee
234 Views
Registered: ‎08-02-2007

@ackye 

125MHZ DRU clock is only used for low resolution, so if your design is only meant to support 4kp60, the answer is YES.

You can uncheck DRU clock in Video PHY IP GUI

xud_0-1619515009704.png

 

View solution in original post

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ackye
Contributor
Contributor
230 Views
Registered: ‎05-19-2020
Thank you
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