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Adventurer
Adventurer
1,265 Views
Registered: ‎10-22-2017

DP receive customized resolution

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In debugging the DP interface. i want to use the DP interface to receive the resolution of 7096*1080. so i need to modify the information of edid in the demo of Displayport subsystem IP. Let EDID support this resolution. However, the EDID specification only leaves 12 bits wide, and there is not enough bit width to represent the resolution of 7096. How should this be done? Thank you!

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Xilinx Employee
Xilinx Employee
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Registered: ‎03-07-2018

Hi @caoshouqi

 

Check for https://www.xilinx.com/support/answers/71499.html and https://www.xilinx.com/support/answers/68227.html

 

Regards,

Bhushan

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Bhushan

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Xilinx Employee
Xilinx Employee
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Registered: ‎03-07-2018

Hi @caoshouqi

 

Check for https://www.xilinx.com/support/answers/71499.html and https://www.xilinx.com/support/answers/68227.html

 

Regards,

Bhushan

-------------------------------------------------------------------------------------------------------------------------------------------------
Kindly note- Please mark the Answer as "Accept as solution" if information provided is helpful.
Give Kudos to a post which you think is helpful and reply oriented.
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Regards,
Bhushan

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Kindly note- Please mark the Answer as "Accept as solution" if information provided is helpful.
Give Kudos to a post which you think is helpful and reply oriented.
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View solution in original post

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Moderator
Moderator
1,152 Views
Registered: ‎11-09-2015

Hi @caoshouqi,

 

I believe there are different versions of EDID. If you check the DP1.4 example design, you will get an example of EDID for 8k resolution. This might help you.

 

You might be also able to find some edid editor on the web, which can help you


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Moderator
Moderator
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Registered: ‎11-09-2015

HI @caoshouqi,

 

Do you have any updates on this topic? Was the answer provided enough for you?

 

If your question is answered or your issue is solved, please kindly mark the response which helped as solution (click on "Accept as solution" button below the reply)

If this is not solved/answered, please reply in the topic giving more information on your current status.

Thanks and Regards,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Adventurer
Adventurer
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Registered: ‎10-22-2017

@florentw

Sorry,my reply is late, I found the standard of edid, but did not find how to represent the representation greater than 4096 resolution.

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Moderator
Moderator
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Registered: ‎11-09-2015

HI @caoshouqi,

 

I believe you should look at the E-EDID specification. The sizes are coded with 12 bits but the coding is (size/8)-31 thus you can go over 4096

 

The DP1.4 example design is showing an EDID which support 8k (thus above 4096)


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Adventurer
Adventurer
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Registered: ‎10-22-2017

hi@florentw

I looked at the description of this part of edid, but I still wonder how this is expressed. Look at the manual on this register is at 26H-35H, it should be describing Standard Timing. I understand that the resolution parameters of the EDID should be described in the 36H to 6CH registers.
I also looked at the 8K/30 edid in the DP1.4 demo. But I didn't find a description of where to support the 8K resolution. 

The following is the 8K/30 resolution edid that I intercepted in the DP1.4 demo. It is convenient to point out where the 8K resolution is indicated?

 

/* 8K30 only + No Audio */
xil_printf("Setting 8K30 only EDID\r\n");
unsigned char edid[256] = {
0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x61, 0x98, 0x23, 0x01,
0x00, 0x00, 0x00, 0x00, 0x28, 0x1C, 0x01, 0x04, 0xA5, 0x3C, 0x22, 0x78,
0x3E, 0x61, 0x50, 0xA6, 0x56, 0x50, 0xA0, 0x00, 0x0D, 0x50, 0x54, 0x00,
0x00, 0x00, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0xFC, 0x00, 0x38, 0x6B, 0x33, 0x30, 0x2D, 0x6F, 0x6E,
0x6C, 0x79, 0x0A, 0x20, 0x20, 0x20, 0x01, 0xFD, 0x70, 0x12, 0x1E, 0x00,
0x00, 0x81, 0x00, 0x04, 0x23, 0x08, 0x1F, 0x03, 0x03, 0x00, 0x14, 0x65,
0x8E, 0x01, 0x84, 0xFF, 0x1D, 0x4F, 0x00, 0x07, 0x80, 0x1F, 0x00, 0xDF,
0x10, 0x3C, 0x00, 0x2E, 0x00, 0x07, 0x00, 0xFE, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x90
};

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Moderator
Moderator
991 Views
Registered: ‎11-09-2015

Hi @caoshouqi,

 

In the DP1.4, in the menu, there is a feature to read the EDID. You can use it to identify the correct section.

 

All the code is available in xedid_print_example.c.

 

Regards,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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