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jorge_2015
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Registered: ‎12-06-2017

Display Port to HDMI adapters

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Hi,

 

I have a zynqmp board with display port but when I try to connect it using a dp-to-hdmi adapter to my monitor no signal is arriving. 

 

From https://www.xilinx.com/support/answers/67462.html I've seen that:

 
DP-to-HDMI adapters currently do not work out of the box, and even in the future there will likely only be a subset of adapters that might work
 
Before buying a new monitor with display port connection I would like to now, which are the subset of adapters that might work ,dp-to-dvi? dp-to-hdmi? dp-to-vga? If is does not work out of the box, which changes I have to make?
 
Now, if a buy a monitor I have seen from here, http://www.wiki.xilinx.com/Zynq%20UltraScale%20MPSoC%20Base%20TRD%202017.4 that there is a list with compatible devices and the GeChic On-Lap1303H has caught my attention. Someone can tell me if the 1303I version (it has touch screen) is a compatible device and when you touch the screen works?
 
Thank you very much,
 
Jorge
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watari
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Registered: ‎06-16-2013

Hi @jorge_2015

 

Sorry for my late reply.

 

>I have read the UG1085 Chapter 33 about display port and I have seen that it is based on the VESA DisplayPort V.12a source-only specification but I do not see anything about the dual mode DP++.

 

"DP++" should be implemented DP Tx logical module, HDMI Tx logical module, signal switcher and high speed transmitter on FPGA and and output suitable format (DP packet or HDMI stream) at demand by result of EDID at AUX by software.

 

In this case, I guess, it seems that MPSoC has a potential to support DP++. But no one releases DP++ design yet.

 

So, if you try to implement DP++ on MPSoC, it might be fine. But it is little difficult.

 

> So if I use an active DP-to-HDMI adapter there would be no problem and I will be able to see the signal right?

 

Yes. An active DP-to-HDMI adapter behaves protocol converter and DC characteristic converter.

 

Best regards,

View solution in original post

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watari
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@jorge_2015

 

I mention about first question.

First of all, I mention about does DP-to-HDMI adapter support HDMI output.

It depends on implemented IC on DP-to-HDMI adapter and its protocol.

# Background
Video data on DisplayPort is composed of packet data.
DisplayPort has two type of mode.
One is single mode (well known "DisplayPort") and the other is dual mode (well know "Dual-Mode DisplayPort or DP++").
And DP++ is composed of packet data and stream data. (not AIX4Stream)
Also, video data on HDMI is composed of stream data.

# Explanation
## Single mode
It only handles DP packet data. So, IC needs to transfer signal protocol from packet data to stream data. (Protocol and electrical characteristics converter.)

## Dual mode
It handles DP packet data and video stream data. It doesn't need to transfer signal protocol. only convert electrical characteristics from DP to TMDS (HDMI).

# Answer about your question

Most DP-to-HDMI adapters are passive type and not active type. It means that they only convert electrical characteristics from DP to TMDS.
So, video data has only packet data, no one can do it.
If source device, like MPSoC and video card support DP++, you can use DP-to-HDMI adapter.
It it difficult to support DP signal on HDMI port at monitor.

Best regards,

jorge_2015
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Registered: ‎12-06-2017

Hi @watari,

 

Thank you for the information you give me, but I am a little bit confused about some things.

 

I have read the UG1085 Chapter 33 about display port and I have seen that it is based on the VESA DisplayPort V.12a source-only specification but I do not see anything about the dual mode DP++.

 

Where can I see that the display port is DP++? Or I need to add an ip in the fpga logic?

 

So if I use an active DP-to-HDMI adapter there would be no problem and I will be able to see the signal right?

 

Best regards,

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watari
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Hi @jorge_2015

 

Sorry for my late reply.

 

>I have read the UG1085 Chapter 33 about display port and I have seen that it is based on the VESA DisplayPort V.12a source-only specification but I do not see anything about the dual mode DP++.

 

"DP++" should be implemented DP Tx logical module, HDMI Tx logical module, signal switcher and high speed transmitter on FPGA and and output suitable format (DP packet or HDMI stream) at demand by result of EDID at AUX by software.

 

In this case, I guess, it seems that MPSoC has a potential to support DP++. But no one releases DP++ design yet.

 

So, if you try to implement DP++ on MPSoC, it might be fine. But it is little difficult.

 

> So if I use an active DP-to-HDMI adapter there would be no problem and I will be able to see the signal right?

 

Yes. An active DP-to-HDMI adapter behaves protocol converter and DC characteristic converter.

 

Best regards,

View solution in original post

florentw
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Registered: ‎11-09-2015

Hi @jorge_2015,

 

If everything is clear for you, please kindly mark @watari's replie as accepted solution to close the topic.

 

Regards,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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jorge_2015
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Registered: ‎12-06-2017

I have tried with three different DP to HDMI active adapters and none worked for me.

 

I have finished buying a new monitor. 

 

Thank you for information above we can close this topic.

 

Jorge

 

 

florentw
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Registered: ‎11-09-2015

Hi @jorge_2015,

 

To close the topic, find the best reply and mark it as accepted solution.

 

You can also give kudos to @watari to thanks him for his help.

 

Regards,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
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zengzxxilinx
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Registered: ‎05-29-2018

do you have solved this problem? I have the same problem  when I try to connect it using a dp-to-hdmi adapter to my monitor,but  no signal . 

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watari
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Registered: ‎06-16-2013

@zengzxxilinx

 

Would you create new post, if your Display Port to HDMI adapter is different in this post ?

I will reply it, if possible.

 

Best regards,

zengzxxilinx
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Registered: ‎05-29-2018
yes, i will create a new post right now! i think the adapter is different
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bmoore
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Registered: ‎01-09-2018

Hi Florent. I have this same issue, but the answer is not clear to me. I want to use the DP output that's hard wired in the Zynq processor in the PS with a passive DP2HDMI adapter, but I'm not sure if watari was talking about that or the pg299 DP TX subsystem IP for the PL. Can someone clarify?

Regards. Brian

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florentw
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Registered: ‎11-09-2015

Hi @bmoore 

Both will not work as both do not support Displayport++.

I wrote AR#71773 for the Displayport Subsystem and AR#71774 for the ZynqMPSoC Displayport Controller


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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watari
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Registered: ‎06-16-2013

Hi @bmoore 

 

# What is passive adaptor ?

 

"Passive adaptor" only works to change voltage level. Not change protocol type.

It means the purpose of it only change voltage level.

 

# What is active adaptor ?

 

"Active adaptor" works to change protocol type and voltage level.

It means that it can convert any protocol, if it has some supported ICs.

 

# What is DP++ ?

 

DP++ support DP and HDMI protocol on DP line.

So, if Tx support DP++, you can deal with HDMI signal with passive adopter.

Because you don't need to change protocol.

 

# Summary

 

Since active adaptor can convert different protocol (ex. DP to HDMI) with some ICs, you can see correct video stream on your monitor.

 

Best regards,

bmoore
Contributor
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Registered: ‎01-09-2018

After posting my query I did more investigating and figured it out myself. Since the PS DP has only 2 lanes, that's not enough to use a passive DP2HDMI dongle as 4 lanes from the DP would be needed (3 data + clock). So I concluded that I need an active adapter or a DP monitor. Thanks for your attention, you can close this query.

Regards, Brian

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florentw
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Registered: ‎11-09-2015

Hi @bmoore 

This is not only related to the number of lanes. Even with the Displayport TX subsystem which can have 4 lanes, you will not be able to use a passive adaptor because Displayport++ is not supported


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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watari
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Hi @bmoore 

 

I agree @florentw 's explanation. It isn't related to lane number.

Since DP Tx controller doesn't support DP++(*1), you must use an active adapter.

 

[note]

*1)

DP++ uses HDMI protocol on DP lane. Not DP protocol.

And, as I already mentioned, a passive adapter only converts io voltage level. Not transfer protocol.

 

*2)

The number of lane on DP is related to resolution, pixel clock, vertical frequency and so on.

In this case, the limitation is 4K@30Hz.

 

*3)

HDMI : like source synchronous clocking. Using clock and data. The ratio between clock and data is 1:10 or 1:40.

DP : using common clocking. Using packets. It is not strictly related to common clock. The limitaion is defined by bandwidth and lane frequency (1.62Gbps(RDR), 2.7Gbps(HBR), 5.4Gbps(HBR2) and 8.1Gbps(HBR3)).

 

Best regards,

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