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Way
Adventurer
Adventurer
248 Views
Registered: ‎10-19-2020

Enquiry on DisplayPort Driver during Topology Discovery

Hi,

I went through the DP driver in order to understand how the topology is discovered for MST situation. There is a function called XDp_TxDiscoverTopology to discover the topology. In the XDp_TxDiscoverTopology, the relative address is passed with an array Relative_Address[15] without any initialization as shown in first snapshot(p1).

However, I noticed that during the first time when running this function, the Link_Total_Count is set to 1 which eventually causes the assignment of sideband message header for relative address did not get executed to get assigned to any value as shown in second snapshot(p2). The for loop will not get executed. Hence, I wonder will the sideband message header for relative address get assigned to any indeterminate value?

The driver is working fine but I would like to get more understanding about how that work. 

Thank you in advance.

 

 

p1.PNG
p2.PNG
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2 Replies
florentw
Moderator
Moderator
160 Views
Registered: ‎11-09-2015

HI @Way 

I guess this is only filled with a random value then this is updated by each MST devices in the path.

The source cannot know the topology before discovering thus cannot set the relative address


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Way
Adventurer
Adventurer
137 Views
Registered: ‎10-19-2020

Hi @florentw 

Thank you for the information regarding the topology discovery

Actually I have another question posted on regards of vid_edid and video_frame_crc helper core as shown in the link below. Wonder if do you have any suggestion on that?

https://forums.xilinx.com/t5/Video-and-Audio/How-to-port-custom-IP-vid-edid-and-video-frame-crc-in/m-p/1179116/highlight/false#M35645

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