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msh
Voyager
Voyager
519 Views
Registered: ‎10-31-2016

Keeping video clock constant for vphy

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Hello, 

 

I would like to configure the VPHY IP. But every time there is output resolition change then I donot want video clock to change whereas TDS clock could change. Because I am using the video clock for other PL IPs. 

scenario: 

If at HDMI 2k monitor is connected then video clock remains the same as it was before with 4k monitor connection. To handle the change we will place scaler to scale down the 4k to 2k. This is scenerio where camera and HDMI ouput work on different resolution. 

 

NOTE: 

I know how to handel this in baremetal application. I connected an GPIO with AND to rdy clock signal, where I toggle GPIO but not rdy clock i.e. donot configure the clock and keep the video clock the same. May I know if there is way to do so via linux driver ?

case1: 

4k input 

4k output 

video clock : 297 Mhz

TDS clock : 592 MHz

 

case 2: 

4k input 

2k output 

video clock : 297 Mhz

TDS clock : 148 Mhz

 

Best regards

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xud
Xilinx Employee
Xilinx Employee
429 Views
Registered: ‎08-02-2007

@msh 

The HDMI(includes Video PHY) drivers are outside of linux-xlnx drivers.

Please refer to HDMI driver page on how to add HDMI driver to kernel :

https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18842136/Xilinx+DRM+KMS+HDMI-Tx+Driver

Followings are the Video PHY drivers :

https://github.com/Xilinx/hdmi-modules/tree/master/hdmi/phy-xilinx-vphy

If you have a closer look, you will find the low level behavior is same as bare-metal drivers. It detects refclk_ready. If you use GPIO to control it, you need to toggle this signal when you do hotplug, change color information. Video PHY will know there is a reference clock change.

 

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xud
Xilinx Employee
Xilinx Employee
460 Views
Registered: ‎08-02-2007

@msh 

In linux, you can use GPIO too, then generate hdf(or xsa) to rebuild the project. following is the way to enable GPIO. Do you see any issues?

Kernel Configuration Options for Driver

To enable GPIO in the kernel, the following configuration options need to be enabled:

CONFIG_GPIO_SYSFS=y
CONFIG_SYSFS=y
CONFIG_GPIO_XILINX=y (for axi_gpio)
 
xud
Xilinx Employee
Xilinx Employee
458 Views
Registered: ‎08-02-2007

@msh 

Devicetree example for GPIO :  
 
axi_gpio_0: gpio@40000000 {
        #gpio-cells = <2>;
        compatible = "xlnx,xps-gpio-1.00.a";
        gpio-controller ;
        interrupt-parent = <&microblaze_0_intc>;
        interrupts = < 6 2 >;
        reg = < 0x40000000 0x10000 >;
        xlnx,all-inputs = <0x0>;
        xlnx,all-inputs-2 = <0x0>;
        xlnx,dout-default = <0x0>;
        xlnx,dout-default-2 = <0x0>;
        xlnx,gpio-width = <0x2>;
        xlnx,gpio2-width = <0x2>;
        xlnx,interrupt-present = <0x1>;
        xlnx,is-dual = <0x1>;
        xlnx,tri-default = <0xffffffff>;
        xlnx,tri-default-2 = <0xffffffff>;
} ;
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msh
Voyager
Voyager
441 Views
Registered: ‎10-31-2016

Isnt the DKM driver i.e vphy, hdmi etc. reconfigure the reference clock every time there is hdmi hot plug ?
also vphy couldnot start after hdmi hot plug detection until it see the ref clock rdy toggle. 

 

In baremetal I donto reconfigure the reference clock, only toggel the gpio. But how will I do it in linux with KMS driver ?

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xud
Xilinx Employee
Xilinx Employee
430 Views
Registered: ‎08-02-2007

@msh 

The HDMI(includes Video PHY) drivers are outside of linux-xlnx drivers.

Please refer to HDMI driver page on how to add HDMI driver to kernel :

https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18842136/Xilinx+DRM+KMS+HDMI-Tx+Driver

Followings are the Video PHY drivers :

https://github.com/Xilinx/hdmi-modules/tree/master/hdmi/phy-xilinx-vphy

If you have a closer look, you will find the low level behavior is same as bare-metal drivers. It detects refclk_ready. If you use GPIO to control it, you need to toggle this signal when you do hotplug, change color information. Video PHY will know there is a reference clock change.

 

View solution in original post

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samk
Moderator
Moderator
357 Views
Registered: ‎10-04-2017

Hi @msh,

 

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