cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 
Highlighted
Visitor
Visitor
1,003 Views
Registered: ‎07-26-2016

MIPI CSI-2 RX IP requirements for working in a Zynq 7030

Jump to solution

 

We have a design using a sensor from OMnivision Ov2718 (FHD 1920x1080, MIPI-CSI2) TX source and the IP from Xilinx as the RX.

From the sensor the MIPI interface is connected to an external connector and then through a cable to the FPGA board.Capture4.PNG

These MIPI lines are connected to the FPGA in the HS lines with the LVDS_25 Iostandard (picture below).  We are not using the Meticom IC, neither the resistor divider approach to get the Lp lines. Under these conditions what are our chances to make it work with our current Hardware?. Can we expect the MIPI lanes to get up?.  Thanks for your input.

 

 

 

Capture3.PNG

 

 

 

Tags (2)
1 Solution

Accepted Solutions
Highlighted
Xilinx Employee
Xilinx Employee
975 Views
Registered: ‎03-30-2016

Hello @jnievesr

Unfortunately, It will not work !
MIPI CSI-2 will not work with only HS lanes connected. You will have to find another solution.
Please fix your board or please buy another board.


Just FYI our MIPI team also tested our MIPI CSI-2 RX IP using Zybo Z7 resistive circuit without any issue.
Zybo Z7 has resistor-network exactly the same configuration as mentioned in XAPP894.
The FPGA device is also similar.

https://reference.digilentinc.com/reference/programmable-logic/zybo-z7/start
https://reference.digilentinc.com/_media/reference/programmable-logic/zybo-z7/zybo_z7_sch-public.pdf
https://reference.digilentinc.com/reference/programmable-logic/zybo-z7/reference-manual

Thanks & regards
Leo

View solution in original post

0 Kudos
1 Reply
Highlighted
Xilinx Employee
Xilinx Employee
976 Views
Registered: ‎03-30-2016

Hello @jnievesr

Unfortunately, It will not work !
MIPI CSI-2 will not work with only HS lanes connected. You will have to find another solution.
Please fix your board or please buy another board.


Just FYI our MIPI team also tested our MIPI CSI-2 RX IP using Zybo Z7 resistive circuit without any issue.
Zybo Z7 has resistor-network exactly the same configuration as mentioned in XAPP894.
The FPGA device is also similar.

https://reference.digilentinc.com/reference/programmable-logic/zybo-z7/start
https://reference.digilentinc.com/_media/reference/programmable-logic/zybo-z7/zybo_z7_sch-public.pdf
https://reference.digilentinc.com/reference/programmable-logic/zybo-z7/reference-manual

Thanks & regards
Leo

View solution in original post

0 Kudos