06-16-2021 06:26 AM
I've been following the PG289 document to generate the ZCU106 design example for the SMPTE UHDSDI Tx subsystem IP.
Using Vivado 2020.2, it fails with the following errors:
INFO: [IP_Flow 19-2313] Loaded Vivado IP repository 'C:/Xilinx/Vivado/2020.2/patches/AR76183_Vivado_2020_2_preliminary_rev2/vivado/data/ip'. INFO: [IP_Flow 19-2313] Loaded Vivado IP repository 'C:/Xilinx/Vivado/2020.2/data/ip'. create_project: Time (s): cpu = 00:00:28 ; elapsed = 00:00:09 . Memory (MB): peak = 1004.020 ; gain = 0.000 INFO: [open_example_project] Importing original IP ... ERROR: [Coretcl 2-1074] Could not find import file 'd:/PROJECTS/VIVADO_2020.2/project_uhd-sdi/.Xil/v_smpte_uhdsdi_tx_ss_0/tmp_v_smpte_uhdsdi_tx_ss_0.gen/sources_1/ip/v_smpte_uhdsdi_tx_ss_0/../../../../tmp_v_smpte_uhdsdi_tx_ss_0.srcs/sources_1/ip/v_smpte_uhdsdi_tx_ss_0/v_smpte_uhdsdi_tx_ss_0.xci' ERROR: [Common 17-69] Command failed: import IP failed in 0 out of 0 cases. See the Messages window for details.
Do you know how to correct this? or, is there another way to generate the example design? Thanks.
06-17-2021 04:35 AM
Hello @sebo ,
Could you please let me know the OS details (Windows / Ubuntu) on which you run this Vivado 2020.2 build. Because, I need to reproduce this issue on that specific OS. Then only I can debug this issue furtherly at my end to resolve this.
Hope you understand!!!
06-17-2021 04:47 AM
06-17-2021 05:46 AM
@ashokkum ok. The project seems to be ok on linux. I was able to generate the bitstream and export the hardware.
However, I can't see how the software project is built to run it. I remember it was done automatically on Vivado/SDK 2018.3.
06-22-2021 02:04 AM
Hello @sebo ,
It is quite similar to SDK. Only you have to invoke VITIS software from your mission and that should point to your project local workspace. All these steps were mentioned in our example design section (Chapter-5) of either PG289 . You can refer page number:55 in this document, for how to launch VITIS and how to work with drivers. So, try to follow the steps as addressed in the PG, that helps you a lot for compiling the software drivers.
Please let me know, if you face any issues, while working with VITIS. I will help you furtherly.