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kuroro20
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Registered: ‎02-04-2019

TPG control color depth

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Hello,

 

I don't know if i missed something, is there a way to control the TPG color depth dynamically when the TPG is on generator mode ?

The only option i see is maximum color depth ,but if is the max, i should be able to generate less, no ?

 

Thx

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florentw
Moderator
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Registered: ‎11-09-2015

HI @kuroro20 

Well... the answer is yes and no.

Main answer is no, you cannot really change this setting in the TPG. 

But when you configure the TPG to do max 10-bit, you set the AXI interface width. And if you add to transmit 8-bits per component data on a 10-bits per component bus, then you the data would be aligned on the MSB (as per UG934

UG934.JPG

And nothing defines that the padding bit (ex. bit 0 and 1) have to be 0. Thus they can be the value they would have been for 10-bits data.

So if you just ignore the bit you do not need then this is like sending another bpc configuration.


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**

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florentw
Moderator
Moderator
176 Views
Registered: ‎11-09-2015

HI @kuroro20 

Well... the answer is yes and no.

Main answer is no, you cannot really change this setting in the TPG. 

But when you configure the TPG to do max 10-bit, you set the AXI interface width. And if you add to transmit 8-bits per component data on a 10-bits per component bus, then you the data would be aligned on the MSB (as per UG934

UG934.JPG

And nothing defines that the padding bit (ex. bit 0 and 1) have to be 0. Thus they can be the value they would have been for 10-bits data.

So if you just ignore the bit you do not need then this is like sending another bpc configuration.


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**

View solution in original post

kuroro20
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Registered: ‎02-04-2019
Okay thank you
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