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Visitor
Visitor
3,059 Views
Registered: ‎04-25-2011

Tcl file evaluation problem in System Generator

Hi!
I have a problem and I hope that someone could help me. I am using System Generator (ISE 13.1 Design Suite) and I am trying to simulate a simple design containing CIC compiler 2.0 block. But, Matlab (R2010b) Simulink can't generate simulation model and reports an error: 


Unable to evaluate Tcl file:c:\xilinx\13.1\ise_ds\ise\coregen\repository\xilinx.com\generators\ngc_netlist_generator_v1_0.tcl


I don't know what to do and any suggestions are welcome!!!

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Xilinx Employee
Xilinx Employee
3,023 Views
Registered: ‎08-01-2007

You might want to try reinsalling the tools.  Also maks sure that you use a 32- bit Matlab and 32-bit SysGen, or 64-bit Matlab and 64-bit SysGen.

 

If that doesn't fix it you might want to open a Webcase.

Chris
Versal ACAP: AI Engines | Embedded SW Support

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