02-16-2020 01:58 AM
02-17-2020 01:32 AM
I am not sure what exactly is your development activity here, but this is not something supported or tested by Xilinx itself. What information are you exactly trying to read from .bit file?
03-02-2020 06:44 AM
I am not sure how to use the AXI VDMA under python/PYNQ.
However, could it be that the issue is happening because you didn't connect the interrupt signals (s2mm_introut, mm2s_introut)? This might be the root cause looking at the error message.
03-17-2020 07:48 AM
Did you make any progress on this? It would be great if you could share your findings with the community
03-18-2020 03:05 AM
Because I believe that the PYNQ workflow is using linux and the linux driver for the AXI VDMA requires the interrupts to be connected
09-04-2020 08:15 AM
I created another design where i use a test pattern generator to pass the signal through HDMI on a monitor.
I am trynig to configure VDMA with pynq video library but the monitor is still blank.