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Visitor ruskuls
Visitor
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Registered: ‎08-10-2018

4 Display Ports on Kinetix FPGA XCKU040

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Designed PCB with 4 Display Port connectors, that are connected to the Kinetix FPGA.

We have trouble with AUX channels, each AUX channel behavies differently. And we do not know where is the problem.

Latest test:

1. Connected 4 AUX channel to LVDS buffer and configured each buffer only in receiving mode;

2. Decoded LVDS AUX channel signals connected to the ILA's;

3. All AUX channels behavies differently.

3.1. 1st channel RX equals to 0;

3.2. 2nd chanel works ok;

3.3. 3rd channel has big noise;

3.4. 4th channel small noise.

 

AC coupled termination were used.

 

XDC file

# DisplayPort Aux channel 1
set_property -dict {PACKAGE_PIN AA20 IOSTANDARD LVDS DIFF_TERM FALSE DIFF_TERM_ADV TERM_NONE DQS_BIAS FALSE EQUALIZATION EQ_NONE} [get_ports {DP_RX_AUXP_CH1}]
set_property -dict {PACKAGE_PIN AB20 IOSTANDARD LVDS DIFF_TERM FALSE DIFF_TERM_ADV TERM_NONE DQS_BIAS FALSE EQUALIZATION EQ_NONE} [get_ports {DP_RX_AUXN_CH1}]
set_property -dict {PACKAGE_PIN AP8 IOSTANDARD LVCMOS25} [get_ports {DP_RX_HPD_CH1}]

# DisplayPort Aux channel 2
set_property -dict {PACKAGE_PIN AB21 IOSTANDARD LVDS DIFF_TERM FALSE DIFF_TERM_ADV TERM_NONE DQS_BIAS FALSE EQUALIZATION EQ_NONE} [get_ports {DP_RX_AUXP_CH2}]
set_property -dict {PACKAGE_PIN AC21 IOSTANDARD LVDS DIFF_TERM FALSE DIFF_TERM_ADV TERM_NONE DQS_BIAS FALSE EQUALIZATION EQ_NONE} [get_ports {DP_RX_AUXN_CH2}]
set_property -dict {PACKAGE_PIN AP9 IOSTANDARD LVCMOS25} [get_ports {DP_RX_HPD_CH2}]

# DisplayPort Aux channel 3
set_property -dict {PACKAGE_PIN V21 IOSTANDARD LVDS DIFF_TERM FALSE DIFF_TERM_ADV TERM_NONE DQS_BIAS FALSE EQUALIZATION EQ_NONE} [get_ports {DP_RX_AUXP_CH3}]
set_property -dict {PACKAGE_PIN W21 IOSTANDARD LVDS DIFF_TERM FALSE DIFF_TERM_ADV TERM_NONE DQS_BIAS FALSE EQUALIZATION EQ_NONE} [get_ports {DP_RX_AUXN_CH3}]
set_property -dict {PACKAGE_PIN AN8 IOSTANDARD LVCMOS25} [get_ports {DP_RX_HPD_CH3}]

# DisplayPort Aux channel 4
set_property -dict {PACKAGE_PIN AC22 IOSTANDARD LVDS DIFF_TERM FALSE DIFF_TERM_ADV TERM_NONE DQS_BIAS FALSE EQUALIZATION EQ_NONE} [get_ports {DP_RX_AUXP_CH4}]
set_property -dict {PACKAGE_PIN AC23 IOSTANDARD LVDS DIFF_TERM FALSE DIFF_TERM_ADV TERM_NONE DQS_BIAS FALSE EQUALIZATION EQ_NONE} [get_ports {DP_RX_AUXN_CH4}]
set_property -dict {PACKAGE_PIN AN9 IOSTANDARD LVCMOS25} [get_ports {DP_RX_HPD_CH4}]

 

 

Thanks in advance,

Rinalds

kinetix_dp_connection_sch.PNG
connector_dp_connection_sch.PNG
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1 Solution

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Visitor ruskuls
Visitor
137 Views
Registered: ‎08-10-2018

Re: 4 Display Ports on Kinetix FPGA XCKU040

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Turns out problem was at xdc settings

set_property -dict {PACKAGE_PIN AA20 IOSTANDARD LVDS DIFF_TERM_ADV TERM_NONE DQS_BIAS FALSE EQUALIZATION EQ_LEVEL0} [get_ports {DP_RX_AUXP_CH1}]
set_property -dict {PACKAGE_PIN AB20 IOSTANDARD LVDS DIFF_TERM_ADV TERM_NONE DQS_BIAS FALSE EQUALIZATION EQ_LEVEL0} [get_ports {DP_RX_AUXN_CH1}]

After this modification noise was gone.

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1 Reply
Visitor ruskuls
Visitor
138 Views
Registered: ‎08-10-2018

Re: 4 Display Ports on Kinetix FPGA XCKU040

Jump to solution

Turns out problem was at xdc settings

set_property -dict {PACKAGE_PIN AA20 IOSTANDARD LVDS DIFF_TERM_ADV TERM_NONE DQS_BIAS FALSE EQUALIZATION EQ_LEVEL0} [get_ports {DP_RX_AUXP_CH1}]
set_property -dict {PACKAGE_PIN AB20 IOSTANDARD LVDS DIFF_TERM_ADV TERM_NONE DQS_BIAS FALSE EQUALIZATION EQ_LEVEL0} [get_ports {DP_RX_AUXN_CH1}]

After this modification noise was gone.

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