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Participant bhanu27
Participant
434 Views
Registered: ‎05-10-2019

CSI2-RX : Cannot Change AXIS TDATA width to 64 for RAW12

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Hi,

I am using CSI2 RX IP with video format bridge. Please see snapshot attached. 

As per CSI2 RX spec  (Page 8 , Table1-1), the width of AXIS TDATA for embedded data is 64 for RAW12

https://www.xilinx.com/support/documentation/ip_documentation/mipi_csi2_rx_subsystem/v4_0/pg232-mipi-csi2-rx.pdf

 

I cannot change the TDATA width to 64 as it is locked. I am not sure why. If I only if I dont choose the video format bridge then the TDATA width of embedded data gets unlocked and can be modified.


Let me know what is TDATA width for embedded data for RAW12 when video format bridge is selected 

with 4 pixels per beat

 

 

 

Tags (2)
CSI2RX_Subsystem.png
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1 Solution

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Xilinx Employee
Xilinx Employee
217 Views
Registered: ‎03-30-2016

Re: CSI2-RX : Cannot Change AXIS TDATA width to 64 for RAW12

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Hello @bhanu27  , Hello @florentw 

When VFB is selected, TDATA is grey-out because it is not selectable by user.
I do agree that hiding TDATA/TDEST/TUSER option from the GUI when VFB is disabled will be better ( will not cause any confussion to users).

Thanks & regards
Leo

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8 Replies
Moderator
Moderator
361 Views
Registered: ‎11-09-2015

Re: CSI2-RX : Cannot Change AXIS TDATA width to 64 for RAW12

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HI @bhanu27 

The  Table1-1 of Page 8  is only applicable for when the video bridge is not enabled.

If the video bridge is enabled, tdata is only used for transmitting data (no embedded data) the mapping follows the AXI-4 Stream rules for interconnecting Xilinx Video IPs (UG934).

Thus if you are configured for 4 pixels per clock in RAW12, TDATA width will be 4*12=48 bits. This is what you get if you check the IP port after the configuration.

Hope that clarifies


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Participant bhanu27
Participant
352 Views
Registered: ‎05-10-2019

Re: CSI2-RX : Cannot Change AXIS TDATA width to 64 for RAW12

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Hi Florent,

Thanks for the response

There are two AXIS Stream interfaces in CSI2-RX.

1) One is for Image Data

I understand from the Spec that when Video format bridge is selected, the width is 48 bit for RAW12 for 4 pixel per beat

2)  Second is for Embedded Data

My question is related to embedded data. Why is coming locked as 32 bit. 

 

 

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Participant bhanu27
Participant
348 Views
Registered: ‎05-10-2019

Re: CSI2-RX : Cannot Change AXIS TDATA width to 64 for RAW12

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Hi Florent,

In continuation to my previous reply, I am attaching snapshot of implementation netlist.

It shows AXIS bus for embedded data as 64 bit even though the GUI option locks it at 32 bit

Thanks

 

csi2Rx_ImplementationNetlist.png
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Moderator
Moderator
341 Views
Registered: ‎11-09-2015

Re: CSI2-RX : Cannot Change AXIS TDATA width to 64 for RAW12

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HI @bhanu27 

Oh sorry I missed the option "Enable non-image interface".

It is just that if you have the video format bridge enable you cannot configure this parameters, your are getting assigned ones. Just ignore the values when the parameters are greyed out.

Regrards,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Moderator
Moderator
287 Views
Registered: ‎11-09-2015

Re: CSI2-RX : Cannot Change AXIS TDATA width to 64 for RAW12

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Hi @bhanu27 

Do you have any update on this topic? Is everyting clear for you?
If your question is answered or your issue is solved, please mark the response which helped as solution (click on the button "Accept as solution" below the reply)

If this is not solved/answered, please reply in the topic giving more information on your current status.

Best Regards,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Participant bhanu27
Participant
268 Views
Registered: ‎05-10-2019

Re: CSI2-RX : Cannot Change AXIS TDATA width to 64 for RAW12

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Closing it as in GUI for the IP configuration, the width is locked to 32 bit but in netlist I can see that the width is 64 bit as desired
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Moderator
Moderator
265 Views
Registered: ‎11-09-2015

Re: CSI2-RX : Cannot Change AXIS TDATA width to 64 for RAW12

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HI @bhanu27 

I have reported this to development to have the correct value updated even when the option is greyed out


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Xilinx Employee
Xilinx Employee
218 Views
Registered: ‎03-30-2016

Re: CSI2-RX : Cannot Change AXIS TDATA width to 64 for RAW12

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Hello @bhanu27  , Hello @florentw 

When VFB is selected, TDATA is grey-out because it is not selectable by user.
I do agree that hiding TDATA/TDEST/TUSER option from the GUI when VFB is disabled will be better ( will not cause any confussion to users).

Thanks & regards
Leo

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