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Contributor
Contributor
465 Views
Registered: ‎10-18-2018

Detection of s_axis_video_Tuser_SOF Early and Late

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Hello!

I want to write a "counter less" logic for detection of early and late of s_axis_video_tuser_SOF signal. Please suggest me a good logic.  

Best Regards,
Urvish
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1 Solution

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Moderator
Moderator
233 Views
Registered: ‎11-09-2015

Re: Detection of s_axis_video_Tuser_SOF Early and Late

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Hi urvish@htic,

Are you so stress about ressources that you need to avoid counters? Counters are not consumming really much of ressources... Not sure if you will be able to save a lot with another way. At lest I am not sure about the time you would spend, if it really worth.


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
7 Replies
Moderator
Moderator
385 Views
Registered: ‎11-09-2015

Re: Detection of s_axis_video_Tuser_SOF Early and Late

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Hello urvish@htic,

You want a "counter less" logic for detection of early and late of s_axis_video_tuser_SOF signal?

Well the solution I see is to invoke black magic ;)

(I do not see any solution without a counter)

Regards,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
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Scholar watari
Scholar
376 Views
Registered: ‎06-16-2013

Re: Detection of s_axis_video_Tuser_SOF Early and Late

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Hi urvish@htic

 

The best way it to implement like PLL or DDS in your device. (Especially phase detector.)

However it is difficult to implement it in FPGA.

 

Best regards,

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Moderator
Moderator
373 Views
Registered: ‎11-09-2015

Re: Detection of s_axis_video_Tuser_SOF Early and Late

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Hi @watari,

This could be a good idea but I am not sure if you would be able to detect a shift of 1 pixel clock


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
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Scholar watari
Scholar
370 Views
Registered: ‎06-16-2013

Re: Detection of s_axis_video_Tuser_SOF Early and Late

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Hi @florentw

 

This solution is similar ADC to generate pixel clock from HSYNC and/or VSYNC...

 

Best regards,

 

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Moderator
Moderator
283 Views
Registered: ‎10-04-2017

Re: Detection of s_axis_video_Tuser_SOF Early and Late

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Hi urvish@htic,

 

Were you able to try watari's solution?

If not, what are your requirements besides "counterless"? What is the issue that you are trying to solve? How does it happen? There may be a better way to solve your problem.

 

Regards,

Sam

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Xilinx Video Design Hub
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Contributor
Contributor
264 Views
Registered: ‎10-18-2018

Re: Detection of s_axis_video_Tuser_SOF Early and Late

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Hi @samk,

I have a image frame coming in RGB24 format and 1 pixell per clock. I have to write a module for finding if the SOF flag is early or late. Because this is a quite simple problem to handle with counters, I want to know if there extits any logic to do the same without using counters and thus minimize the resource count.

 

Regards,

Urvish 

Best Regards,
Urvish
0 Kudos
Moderator
Moderator
234 Views
Registered: ‎11-09-2015

Re: Detection of s_axis_video_Tuser_SOF Early and Late

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Hi urvish@htic,

Are you so stress about ressources that you need to avoid counters? Counters are not consumming really much of ressources... Not sure if you will be able to save a lot with another way. At lest I am not sure about the time you would spend, if it really worth.


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**