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Scholar
Scholar
4,492 Views
Registered: ‎11-09-2013

DisplayPort AUX debug monitor IP Core, free use

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as we ended up making an IP Core during ZU+ DisplayPort Debugging, well it is released as free IP core, if anyone has same needs.

 

http://www.trenz-electronic.de/de/download/d0/Trenz_Electronic/d1/ipcores/d2/2016.1.html

 

IP core is very simple, it requires 100mhz clock and should be connected to the DP AUX pins from ZU+ PS IP Block in Vivado, the decoded data is converted to AXI Stream. In our debug I connected ILA to this IP Core, set data qualifier to AXI TVALID, and then saved the data as CSV for offline decoding in Excel.

 

well I hope there is not so much need in such debugging, but if, then please use this IP core..

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Xilinx Employee
Xilinx Employee
8,321 Views
Registered: ‎07-31-2012

Re: DisplayPort AUX debug monitor IP Core, free use

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Thanks for sharing!
Thanks,
Anirudh

PS: Please MARK this as an answer in case it helped resolve your query.Give kudos in case the post guided you to a solution.

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1 Reply
Highlighted
Xilinx Employee
Xilinx Employee
8,322 Views
Registered: ‎07-31-2012

Re: DisplayPort AUX debug monitor IP Core, free use

Jump to solution
Thanks for sharing!
Thanks,
Anirudh

PS: Please MARK this as an answer in case it helped resolve your query.Give kudos in case the post guided you to a solution.

View solution in original post