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Adventurer
Adventurer
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Registered: ‎08-21-2017

DisplayPort DPCD override

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Hi,

I'm looking for some example of DPCD override registers use (page 29, 30, 31, PG233). I want to force DP link to 2.7 Gbps and/or 2 lanes instead of 4, but I'm not sure when should I do this during IP core init. Should I just do it as soon as possible (beginning of init)?

Thanks

Srdjan

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Moderator
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Registered: ‎11-09-2015

Re: DisplayPort DPCD override

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HI @srdjan.opacic 

You can change the line rate in the Video PHY


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Moderator
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Registered: ‎11-09-2015

Re: DisplayPort DPCD override

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Hi @srdjan.opacic 

It might work but it is not the best solution. You might need to make sure that the driver is not re-writting the value based on the HW configuration (it might require to updated the drivers).

Is there a reason why you are not limiting the capabilities in the HW?

Regards


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Adventurer
Adventurer
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Registered: ‎08-21-2017

Re: DisplayPort DPCD override

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Hi @florentw ,

SW configuration seems more flexible, but if it is possible that driver will overwrite them, I'll use HW limitations instead. How can I force DP to work with maximum 2.7 Gbps? I see no such setting in Vivado IP configuration.

For reference, I'm using Vivado 2017.3.1, DP RX subsystem v2.1. DP port configuration 4x5.4Gbps lanes.

Thanks

Srdjan

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Moderator
Moderator
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Registered: ‎11-09-2015

Re: DisplayPort DPCD override

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HI @srdjan.opacic 

You can change the line rate in the Video PHY


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**

View solution in original post

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Adventurer
Adventurer
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Registered: ‎08-21-2017

Re: DisplayPort DPCD override

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Sorry, forgot about that option.

Thanks

Srdjan

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