10-18-2017 02:09 AM
I'm designing on a Kintex Ultrascale a Displayport Rx subsystem, I'm using microblaze and after a few lines of code (i2c initialization ad DisplayPort Rx subsystem initialization) the SDK starts showing me errors about overflow of stack or bss.
I understand that's must be related to microblaze BRAM, in the block design I put the maximum memory size and I keep receiving the same error, so my question is if in DisplayPort application the microblaze must have an external Ram?
10-18-2017 07:11 AM
Starting in Vivado 2017.3, the DisplayPort RX and TX Subsystems offers some example designs that show you how to build the designs, including how to setup and use MicroBlaze.
I recommend you take a look at Chapter 5 of PG233.
Once you have the design implemented you can then look at the SDK settings, including the stack and heap allocation.
10-20-2017 07:09 AM
thank you for your hint, actually seems that I solved the problem with microblaze, was something related to the memory allocation, anyway I'm using Vivado 2017.3 and I try to implement the example design but I receive many errors so I can't generate the .bit file.
In attachment you can find the errors I get.
10-23-2017 08:14 AM
As some IP cores become more complex, they require deeper hierarchical structures, forcing projects built in Windows to use shorter path lengths. The errors are caused by the path length being longer than the maximum 260-Bytes allowed by Windows. Please see Answer Record AR52787 for more information.
The path shown in the error below is 280 Bytes. To reduce this to below 260 Bytes the quickest way will be to copy the project to c:/X/dp/. The path will now be: c:/X/dp/dp_rx_subsystem_0_ex.srcs/sources_1/bd/dp_rx_subsystem_0_design_synth/ip/dp_rx_subsystem_0_design_synth_axis_clock_converter_0_0/dp_rx_subsystem_0_design_synth_axis_clock_converter_0_0/dp_rx_subsystem_0_design_synth_axis_clock_converter_0_0.xdc
Here is the error shown in your log:
ERROR: [Common 17-680] Path length exceeds 260-Byte maximum allowed by Windows: c:/test_xilinx/dp_rx_subsystem_0_ex/dp_rx_subsystem_0_ex.srcs/sources_1/bd/dp_rx_subsystem_0_design_synth/ip/dp_rx_subsystem_0_design_synth_axis_clock_converter_0_0/dp_rx_subsystem_0_design_synth_axis_clock_converter_0_0/dp_rx_subsystem_0_design_synth_axis_clock_converter_0_0.xdc
Please consider using the OS subst command to shorten the path length by mapping part of the path to a virtual drive letter. See Answer Record AR52787 for more information.