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Contributor
Contributor
96 Views
Registered: ‎05-09-2018

Error generating DT for SDI TX SS

I get a similiar error (i.e. Invalid option value '' specified for 'object') when trying to create the device-tree for a design containing the SDI TX subsystem IP.  I believe the error is a result of how the IP block is connected (i.e. the VID_IO_IN is no being driven by an "allowed" source) based on the rest of the error message: 

| ERROR: [Hsi 55-1545] Problem running tcl command ::sw_sdi_tx::generate : ERROR: [Common 17-161] Invalid option value '' specified for 'object'.
|
| while executing
| "get_property IP_NAME $connected_ip"
| (procedure "::sw_sdi_tx::generate" line 34)
| invoked from within
| "::sw_sdi_tx::generate v_smpte_uhdsdi_tx_ss_SDI_A"
| ERROR: [Hsi 55-1442] Error(s) while running TCL procedure generate()
| hsi::generate_target: Time (s): cpu = 00:00:07 ; elapsed = 00:00:11 . Memory (MB): peak = 788.984 ; gain = 17.207 ; free physical = 2579 ; free virtual = 54054
| generate_target failed
| while executing
| "error "generate_target failed""
| invoked from within
| "if {[catch {hsi generate_target -dir $project} res]} {
| error "generate_target failed"
| }"
| (file "/home/fpga1/petalinux/spu/build/tmp/work/plnx_zynqmp-xilinx-linux/device-tree/xilinx+gitAUTOINC+b7466bbeee-r0/dtgen.tcl" line 38)

I noticed the DTG wiki page said this under the Limitations section: 

 

DTG supports the video pipeline generation based on the internal TRD designs as mentioned in the wiki 

https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/25329832/Zynq+UltraScale+MPSoC+VCU+TRD+2018.3

If there are any custom IPs connected between the video pipeline IPs DTG wont support those, user may need to add the input and output ports.
 
I'm not sure how to "add the input and outputs"
 
I also cloned the latest DTG from github (which included some 2019.1 folders) and was able to successfully generate the dts and dtb files so maybe this is an issue in 2018.3 that will be fixed in 2019.1?
Screenshot from 2019-05-14 17-00-55.png
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4 Replies
Contributor
Contributor
93 Views
Registered: ‎05-09-2018

Re: Error generating DT for SDI TX SS

 
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Moderator
Moderator
60 Views
Registered: ‎11-09-2015

Re: Error generating DT for SDI TX SS

Hi @malburgj ,

I tried to generate the device tree using HSI (as per wiki page) and I can generate the device tree with the latest version of the device tree.

The DTS files are attached.

Can you try again on your side?

The DTS file will be generated but will not be complete. This is were the reference from the vcu trd is useful. You need to add the video in and out endpoint manually. You will need to refer to the following wiki page:

https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/128024605/DTG+limitation+for+multimedia+IPs

 


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
Contributor
Contributor
42 Views
Registered: ‎05-09-2018

Re: Error generating DT for SDI TX SS

Awesome, thanks for the link explaining how to define the input/output, that's what I was looking for.  

I was able to generate the DTS using HSI but not Petalinux; when I pulled the DT sources from github I noticed there were 2019.1 sources being pulled also and didn't know if this was why HSI worked and Petalinux (2018.3) did not.  I'll use HSI for now.

Thanks again.

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Moderator
Moderator
30 Views
Registered: ‎11-09-2015

Re: Error generating DT for SDI TX SS

Hi @malburgj ,

Yes the master branch can be updated compared to the latest release. This will probably mean that 2019.1 should have this issue fixed.

Regards


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
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