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Visitor kk909
Visitor
5,570 Views
Registered: ‎12-12-2007

FIR Compiler Block

Hi.
Can anyone share me that what is function of number of channel inside the compiler block GUI?

And what should i do  if i  set  the number of channel is 2?

 Is it the inputs(2 inputs) need to do the TDM process before enter the block?


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Xilinx Employee
Xilinx Employee
5,557 Views
Registered: ‎08-02-2007

Re: FIR Compiler Block

You can find more details as well as timing diagrams of what you can do for Multi-Channel Filter implementations in the users guide (ds534) for the core. Take a look at the operation in section "Input/Output Channel Decoding" and analize what is happening with the two signals "CHAN_IN" and "CHAN_OUT". If you are working with multiple coefficient sets you will have to utilize the "FILTER_SEL" signal.
RJ Duran
Customer Application Engineer
Technical Support: http://www.xilinx.com/support
Xilinx User Community: http://forums.xilinx.com
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