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Noisy output image while running on hardware.

I have created a custom IP core on Vivado HLS using the code here. When I simulate it on PC (Vivado HLS simulation), I get a good expected output image. However, when I integrate it and run it on hardware, I can see blocks on the image. Here are certain points:

  1. Although there are many other functions, I am sure it is because of the clahe.cpp code. If I remove this particular function call, it works well.
  2. I have read the processed image from memory. This contains those blocks too.

I have attached a video of the output which has this issue along with this post. Please let me know where you suspect the issue to be.


My point is when the same function gives good results when simulated, it should work on hardware too. The only difference between the function simulation on vivado HLS and running on hardware will be the Vivado HLS directives.... which come into play on hardware. Right? I have spent a lot of time trying to figure out which directives to use, but is this the issue? What else should I check?


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Registered: ‎04-26-2015

Re: Noisy output image while running on hardware.

Could you post the code that is actually being synthesized? The one you linked looks like it would have needed some significant adjustments to work with HLS, since HLS doesn't like malloc (at least for synthesis) and often just converting to an array doesn't work either due to the limited block RAM on chip.


Are you using straight C or C++? I've found that HLS is generally better-behaved with C++.

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