06-30-2017 02:26 AM
07-04-2017 04:15 AM
From the screenshot, it looks like rx_tmds_clk isn't properly constrained in IPI. Can you provide following information, please?
1. Open synthesized design, and then type "report_clocks" in tcl console, and then attach the generated clock report.
2. Take a screenshot for your design, showing the clock structure of your design, especially how you drive rx_tmds_clk.
07-05-2017 02:18 AM
07-17-2017 02:02 AM
The report you attached isn't associated to the design which has original error :
1. In the error message, the MMCM is called hdmi_4/inst/RXPLL_INST, I guess the design name is called hdmi_4. While in the report, it's called
2. In the error message, the period for hdmi_4/inst/RXPLL_INST/CLKIN is 1.667. While the period for hdmi_phy_1/inst/RXPLL_INST/CLKIN1 is 8 ns
So I doubt whether you are debugging the same design.