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Contributor
Contributor
374 Views
Registered: ‎04-02-2013

Problems configuring MIPI CSI-2 RX for RAW16

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We need guidance with configuring the MIPI CSI-2 RX v4 subsytem properly for RAW16.

We are using a 640x480, 16-bit pixel image (25Mhz pix clock). We have no problem receiving an 8-bit image of that format over 2 lanes (100Mb D-PHY), using a video clock =25MHz and a RxByteClkHS =12.5MHz.

For the 16-bit image over a 2 lane D-PHY (200Mb) w/ RxByteClkHS of 25MHz, it appears that the RX SS D-PHY has received all 1280 bytes/line as expected. But we only receive ½ of the 16-bit image through the MIPI RX SS controller(hidden)/VFB output no matter if the RX SS is configured for RAW8 or RAW16. We thought that selection of RAW16 would process the input pixels differently, and also report the 0x2E data type (w/ RAW16 data type present in the long packet header/line) to the TUSER field at output of VFB, but it always shows 0x2A (RAW8).

 

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Contributor
Contributor
264 Views
Registered: ‎04-02-2013

Re: Problems configuring MIPI CSI-2 RX for RAW16

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Hello Leo,

Problem solved. Your request for a register dump was the key. The designer had built in a continuous read of that status (0x24) register throughout the frame(s), and when looking again during RAW16 mode the ECC error bit was set. Early on in design, he hardcoded the value for RAW8 640 pixels, based on what was seen out of the MIPI TX SS. We never went back into the code and added a function to calculate this on-the-fly. So the incorrect ECC caused the MIPI RX SS to correct the data type from RAW16 back to RAW8. And that is also why we could never change the word count in the packet header to 1280 from 640 and get it to run.

With this fixed we get the 0x2E RAW16 code out of the RX SS, and with a word count of 1280, it looks like the entire 16-bit image is output.

Thanks much for your time and help on this problem. 

8 Replies
Xilinx Employee
Xilinx Employee
364 Views
Registered: ‎03-30-2016

Re: Problems configuring MIPI CSI-2 RX for RAW16

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Hello David @dhill972 

> TUSER field at output of VFB, but it always shows 0x2A (RAW8).

This is not good.
Are you set the correct Data type format on your sensor ?

Could you please share your
    1. XCI file.
    2. Register dump.
    3. ILA file of data lanes. ( Try to capture HS packet header. I can double check on the header data ) 
I want to know what is what is going on.

Thanks & regards
Leo

 

Contributor
Contributor
320 Views
Registered: ‎04-02-2013

Re: Problems configuring MIPI CSI-2 RX for RAW16

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Hello Leo,

The forum would not allow me to add XCI file to this post so I will work on getting that to you through an alternate path. After running the 4 lane simulation, we cannot get the right combination of settings. 

Can you explain how to obtain the register dump?

This is between the Rx PHY and the Rx controller (64-bit tdata). Here is the video_aclk/lite_aclk @50Mhz and it appears that the Rx controller stops processing half-way into the line. RxbyteclkHS is 12.5M. Even if the video_aclk is dropped to 25Mhz, it will take up the entire line, but still only grab half the pixels.

sim_1.png

Here is a zoom of the packet header for the first line (640 pix 0x280). We thought maybe we should be sending a word count of 1280 (0x500) since the input is 16-bit (2 bytes/pixel), but the RX seems to stop working: (data type 0x2E, RAW16)

sim_2.png

And here is the output of the MIPI RX, where the data type shows up as 0x2A, RAW8. Shown @frame start, 50Mhz video_aclk, TDATA is 16-bit wide.

sim_3.png

And here is the zoomed output capture at beginning of line. Every other 16-bit word has a 0x0000 inserted:

sim_4.png

This is what is seen, half the image, w/every other line @0x0.

output.png

Again, 8-bit (RAW8 processing) image works fine in 2-lane or 4-lane through this without any problem. Seems like it is sending too much data when using a 16-bit image, and it does not sample correctly when using these settings and clock frequencies.

Thanks very much for your help!

 

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Xilinx Employee
Xilinx Employee
310 Views
Registered: ‎03-30-2016

Re: Problems configuring MIPI CSI-2 RX for RAW16

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Hello David @dhill972 

Thank you for sharing your ILA waveform.

1. It seems that your sensor is correctly sending RAW16 packet header, but MIPI CSI-2 RX recognize it as RAW8.

2. Regarding XCI.
    You can also capture the wizard GUI and share it in this Forum. Is it 2019.1 or 2018.3 ?
    -- I assumed that you enabled "Support CSI Spec V2_0" option , and select RAW16.
       I also assumed that you are using 1 pixel-per-clock.

3. Everything looks good to me.
    So, I definetly needs your register dump, to see if there is any error flag asserted.
    You can read MIPI CSI-2 RX register via AXI I/F.
    If your register also looks good, I will escalate this issue to development team.

Thanks & regards
Leo

Contributor
Contributor
303 Views
Registered: ‎04-02-2013

Re: Problems configuring MIPI CSI-2 RX for RAW16

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Here's a portion of the XCI:

<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CMN_INC_VFB">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CMN_NUM_LANES">4</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CMN_NUM_PIXELS">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CMN_PROJ_FAMILY">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CMN_PXL_FORMAT">RAW16</spirit:configurableElementValue>

<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_EN_CSI_V2_0">true</spirit:configurableElementValue>

<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SELECTEDSIMMODEL"/>
<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SHAREDDIR">../../ipshared</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SWVERSION">2018.3</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SYNTHESISFLOW">GLOBAL</spirit:configurableElementValue>
</spirit:configurableElementValues>

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Moderator
Moderator
299 Views
Registered: ‎11-09-2015

Re: Problems configuring MIPI CSI-2 RX for RAW16

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HI @dhill972 

If you zip the xci file you should be able to add it to the topic.

Another what might be to add a fake externsion like .txt file


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Contributor
Contributor
295 Views
Registered: ‎04-02-2013

Re: Problems configuring MIPI CSI-2 RX for RAW16

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Text did not work, but hopefully zip will.

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Contributor
Contributor
265 Views
Registered: ‎04-02-2013

Re: Problems configuring MIPI CSI-2 RX for RAW16

Jump to solution

Hello Leo,

Problem solved. Your request for a register dump was the key. The designer had built in a continuous read of that status (0x24) register throughout the frame(s), and when looking again during RAW16 mode the ECC error bit was set. Early on in design, he hardcoded the value for RAW8 640 pixels, based on what was seen out of the MIPI TX SS. We never went back into the code and added a function to calculate this on-the-fly. So the incorrect ECC caused the MIPI RX SS to correct the data type from RAW16 back to RAW8. And that is also why we could never change the word count in the packet header to 1280 from 640 and get it to run.

With this fixed we get the 0x2E RAW16 code out of the RX SS, and with a word count of 1280, it looks like the entire 16-bit image is output.

Thanks much for your time and help on this problem. 

Xilinx Employee
Xilinx Employee
197 Views
Registered: ‎03-30-2016

Re: Problems configuring MIPI CSI-2 RX for RAW16

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Hello David 

Thanks a lot for debugging and sharing the status of this issue.
I am glad that is working now.

Regards
Leo

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