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Adventurer
Adventurer
5,363 Views
Registered: ‎06-25-2015

SDI alignment

Hello, I am working with the XAPP592 and I am trying to understand how the alignment of the GTX is being done. My understanding of it is that the SMPTE SD/HD/3G core does not care how the data is aligned in the GTX_RX. The alignment is handled by the framer. Do I have a correct understanding of this? Thank you for your response in advance.

 

Adam Gropp

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Xilinx Employee
Xilinx Employee
5,348 Views
Registered: ‎05-07-2015

Re: SDI alignment

HI @acgropp1


The GTX  receiver searches the incoming serial stream for Commas (8B/10B Control(K) characters that cannot be created by concatenating other characters). When it finds a Comma, lines up the comma boundary to its byte boundary, so that all the data that follows is aligned.

Thanks
Bharath
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Adventurer
Adventurer
5,340 Views
Registered: ‎06-25-2015

Re: SDI alignment

I am confused by this. Per the application note XAPP592 on page 29, it states that RXSLIDE and comma detection features are not used for SDI applications. When I look at the transceiver attributes (from the application note) it does not have 8b10b encoding enabled and it does not have comma detection enabled. However, when I looked at all of the modules included in the SMPTE SD/HD/3G core I noticed that the received data goes through a decoder (NRZI -> NRZ -> descrambler) and then to a framer and other things. The framer looks for the TRS and uses a barral shifter to align the data correctly. At least this how I understand it to be. I do understand that the GTX is a pipe and the RX_DATA must be align correctly. 8b10 uses comma detection, 64b66b uses a preamble and gearbox. I am just trying to understand how SDI works. The application note (XAPP592) works as it should. I am trying to understand it fully because I have added another GTX to intercept the RX_DATA before sending it to the SMPTE core and GTX_CTRL. The SMPTE core is able to lock onto the mode and extract most of the TRS (SAV/EAV) and somewhat lock on to the transport rate/family/scan. I know that SDI handling is very tricky and requires careful clocking of the data when working with GTX. I am just trying to understand if my problem is more timing, alignment, both, or something else that I have not thought about. I am using a FIFO to synchronize the data from one GTX to the other. I do thank you for your response. 

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Xilinx Employee
Xilinx Employee
5,339 Views
Registered: ‎08-01-2007

Re: SDI alignment

SDI is different than most serial protocols as it does not use comma characters.  That is why the 8b/10b is not used by SDI.  It doesn't use them because that would add additional overhead in order to transmit the data.  As such that is why the barrel shift is implemented in fabric.  It is used to look for a few key words in the data that can be used for alignment.

 

If you want to find out more about SDI, you will want to look at XAPP1014.  This app note had a lot more details that might help you better understand SDI.


Beyond that I also recommend you look at the SMPTE standards.

Chris
Video Design Hub | Embedded SW Support

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Adventurer
Adventurer
5,250 Views
Registered: ‎06-25-2015

Re: SDI alignment

@chrisar

Thank you for this information. I think I may be dealing with more of a timing issue. Not entirely sure though. I have attached some pictures of the ILA. I am just curious as to what you think the problem looks like. Missing_eav_zoomed_out is a picture to show the missing eav word. Missing_eav_data is a picture zoomed in on where the eav should be relative to the last eav. I am working with HD-SDI. Thank you for your help.

 

Adam Gropp

missing_eav_zoomed_out.PNG
missing_eav_data.PNG
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Xilinx Employee
Xilinx Employee
5,236 Views
Registered: ‎08-01-2007

Re: SDI alignment

I would recommend comparing your design to the XAPP running on the demo board.

Also you may want to test your source against an SDI Analyzer and make sure it is sending the EAV.
There could also be board level signal integrity issues, thought that is less likely since your only doing HD-SDI.

 

If  you need more than this, you should open a Service Request with the Xilinx technical Support.

Here is how to contact them.
http://www.xilinx.com/support/services/contact_info.htm

Chris
Video Design Hub | Embedded SW Support

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Adventurer
Adventurer
5,114 Views
Registered: ‎06-25-2015

Re: SDI alignment

Ok thank you for your help.

 

Adam Gropp

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