12-04-2018 10:28 PM
I have implemented 12G SDI example on KC705 and Inrevium Fidus FMC card and loopback test is working for all modes 6G and below. I am not using 12G in design. tx_format_sel is always fixed to 4.
Then I ported design to ZC706 following instructions from XAPP1249, using 6G SDI wrapper (not 12G_8S_WRAPPER) and also correcting for different MGTREFCLK input pins. QPLL QPLL_FBDIV_TOP is set to 40 in common.v QPLL and CPLL lock is achieved.
After porting, the RX path can only achieve mode and format lock at tx_mode_async = 4 (6G-SDI) and 2 (HD) only, but not 3G(level A and B), HD and SD. Can anyone advise what could be the problem?
12-05-2018 01:52 PM
wtneo@leicaYou are using the correct approach for the porting, by starting with XAPP1249 and porting it to the ZCU106. The one thing I would recommend is that you start by porting the design over without any modifications. Start with the same wrapper (12G SDI) as is used in the XAPP1249 and see if you can get it working that way first. I believe most of the testing is done with the 12G SDI wrapper and it is likely to be the most robust. Once you get that working, then you can go back and use the 6G SDI wrapper.
12-05-2018 05:24 PM
I am porting to ZC706 not ZCU106.
12G SDI wrapper and 6G SDI wrapper are quite similar. I am able to modify 12G SDI wrapper to emulate 6G SDI wrapper.
I am unable to test 12G SDI since the FPGAs used on KC705 and ZC706 are only speed grade 2. It is mentioned in UHD SDI product guide that 12G SDI needs speed grade 3. So I am only testing 6G SDI and below. Am I right to change QPLL_FBDIV_TOP to 40 since I am only using 6G SDI?
The original example cannot be simply changed over from KC705 to ZC706. QPLL config parameter copied from KC705 example does not work on ZC706. By following XAPP1249 instructions to generate GTX and PLLs wrappers, I am able to get it to work partially.
Can you advise what are the changes to original x7gtx_uhdsdi_12g_wrapper instantiation to adapt it for ZC706 6G SDI use?