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Observer jtobin
Observer
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Registered: ‎05-03-2015

SOFLATE errors with asynchronously clocked VDMA

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Hey everyone, I'm working a design where I'm implementing an SDI transmitter on a XC7Z045, which is fed from a test pattern generator that's buffered by a VDMA. I've used the VDMA successfully before without issues, but after moving to this design where it's using asynchronous clocks, I'm having some trouble.

 

My design goes TPG --> VDMA --> RGB2YCRCB -> Video to Axi4S Out -> SDI TX BRIDGE -> SMPTE SDI Core -> GTX instance. When I run it, everything appears to be fine, but the VDMA only transfers a few lines before stopping and throwing a SOFLATE error, as seen below, under the "vdma in" label:

 

vdma_issue.PNG

 

And here's a zoomed in shot:

 

vdma_issue_small.PNG

 

As seen above, tuser is asserting for the first value, at the same time that tvalid is asserted, and then the remaining pixels are sent out, so I'm not seeing where the SOFLATE error is coming from, unless the data isn't actually being transferred for some reason.

 

My clocks are as follows:

s_axi_lite: 50MHz (have also tried 125MHz)

m_axi_mm2s: 200MHz

m_axi_s2mm: 200MHz

m_axis_mm2s: 148.5MHz (driven by TXUSRCLK from the GTX)

s_axis_s2mm: 140MHz

 

I'm setting the MM2S and S2MM control registers to 0x1408b. After initialization, the status registers both show 0x10000, and everything looks good. HSIZE is set to 1280, VSIZE to 720, and stride to 3840 (1280*3 channels for RGB value). Once I run the TPG, S2MM status shows 0x14810, which indicates the SOFLATE error.

 

Does anyone have some suggestions as to what could be going wrong? As far as I can tell everything is being initialized correctly, and my ILA captures appear to be fine.

 

Thanks!

 

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Observer jtobin
Observer
1,181 Views
Registered: ‎05-03-2015

Re: SOFLATE errors with asynchronously clocked VDMA

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Looks like I found the issue(s). I'd originally tied the VDMA reset high, but changed it and added a Processor System Reset IP to drive its reset instead. I also went from two HP ports, one for MM2S and one for S2MM, to a single HP port. Making these two changes fixed the issues I was having- maybe there could have been some sort of issue where both HP ports were trying to access the same memory location at the same time? Not sure, but I'm curious if anyone has some suggestions as to why that could've caused an issue.

1 Reply
Observer jtobin
Observer
1,182 Views
Registered: ‎05-03-2015

Re: SOFLATE errors with asynchronously clocked VDMA

Jump to solution

Looks like I found the issue(s). I'd originally tied the VDMA reset high, but changed it and added a Processor System Reset IP to drive its reset instead. I also went from two HP ports, one for MM2S and one for S2MM, to a single HP port. Making these two changes fixed the issues I was having- maybe there could have been some sort of issue where both HP ports were trying to access the same memory location at the same time? Not sure, but I'm curious if anyone has some suggestions as to why that could've caused an issue.