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Adventurer
Adventurer
2,007 Views
Registered: ‎05-04-2014

TPG IP syth error at vivado 2017.3

Hi,

 

I upgrade HDMI 2.0 example design from vivado 2017.2 to vivado 2017.3, and there is a synthesis error with TPG IP .

 

Please find the runme.log as attached.

 

BR,

Sitting

 

 

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17 Replies
Adventurer
Adventurer
1,969 Views
Registered: ‎05-04-2014

Re: TPG IP syth error at vivado 2017.3

Hi,

 

I create new project to test TPG IP at Vivado 2017.3, and the error log is the same.

 

What can I do to solve this problem?

 

BR,

Sitting

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Moderator
Moderator
1,929 Views
Registered: ‎10-04-2017

Re: TPG IP syth error at vivado 2017.3

Hi @sitting,

Can you try creating a new project to test TPG IP in a directory such as "c:/X/"?


This problem looks like a Windows project length issue. Windows has a max path length of 260 Bytes, and when a project is in a directory with a long path, the tools may fail. For more information, please see AR#52787.

Regards,
Sam

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Xilinx Video Design Hub
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Adventurer
Adventurer
1,900 Views
Registered: ‎05-04-2014

Re: TPG IP syth error at vivado 2017.3

Hi @samk,

 

The error is still happened in  "c:/"

My OS is windows 10 pro x64 (10.0.15063 build 15063)

擷取.PNG

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Moderator
Moderator
1,890 Views
Registered: ‎10-04-2017

Re: TPG IP syth error at vivado 2017.3

Hi @sitting,

 

Thank you for verifying that the Windows path length was not the issue.

It looks like you are using the base MicroBlaze design to test TPG. Can you list the steps I would need to replicate your issue?

Alternatively, if your goal is to test the TPG, Xilinx provides a detailed TPG example design which is outlined in PG103. Following this may be a faster solution for you.

Regards,
Sam

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Xilinx Video Design Hub
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Adventurer
Adventurer
1,860 Views
Registered: ‎05-04-2014

Re: TPG IP syth error at vivado 2017.3

Hi @samk,

 

The steps are as below:

 

1. Create HDMI RX IP in vivado 2017.3 

41.PNG

2. open IP example design (pass through mode).

 

3. Generate output product (OOC mode).

 

擷取.PNG

 

4. TPG ip synthesis fail 

 

Regards,
Sitting

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Moderator
Moderator
1,853 Views
Registered: ‎10-04-2017

Re: TPG IP syth error at vivado 2017.3

Hi @sitting,


Following your steps, I can successfully generate all output products.

1. Which board are you targeting?
2. Can you attach the log associated with the errors?

Regards,
Sam

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Xilinx Video Design Hub
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Adventurer
Adventurer
1,840 Views
Registered: ‎05-04-2014

Re: TPG IP syth error at vivado 2017.3

Hi @samk,

 

1. My target board is KC705

kc705.PNG

 

2.please find the attachment.

 

Regards,

Sitting

 

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Moderator
Moderator
1,830 Views
Registered: ‎11-09-2015

Re: TPG IP syth error at vivado 2017.3

Hi @sitting,

 

I have also tried on my windows machine and I am also not able to reproduce your issue.

 

I have noticed that on your screen for the example design, the source window does not show the wrapper file while it should be automatically generated by the example design:

HDMI.PNG

Could you let me know if it is generated or not? If not if could be an error during the example design project creation.

 

Could you post the vivado.log file? It is generated where you have lauched vivado. To find this location, just type pwd in the tcl console.

 

Could you also attached your project? (clear the output products and zip the folder).

 

Kind Regards,

 

Florent


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Adventurer
Adventurer
1,816 Views
Registered: ‎05-04-2014

Re: TPG IP syth error at vivado 2017.3

Hi @florentw,

 

1. Here is my screenshot.

111111111111111.PNG

2 & 3: Please find the attachment

 

Regards

Sitting

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Moderator
Moderator
1,658 Views
Registered: ‎11-09-2015

Re: TPG IP syth error at vivado 2017.3

Hi @sitting,

 

I have tried with you project and I had no issue. Could you make sure you have the Test Pattern Generator license on your machine? (Check in vivado license manager).

If not you can generate it for free in your account:

lic.PNG

 

tpg.PNG

 

Regards,

 

Florent


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Adventurer
Adventurer
1,651 Views
Registered: ‎05-04-2014

Re: TPG IP syth error at vivado 2017.3

Hi @florentw,

 

Here is my license status, it is still valid.

1.PNG

 

I generate TPG in vivado 2017.2, it has no problem. My colleagues have same error. 

 

 

BR,

Sitting

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Moderator
Moderator
1,641 Views
Registered: ‎11-09-2015

Re: TPG IP syth error at vivado 2017.3

Hi @sitting,

 

I will see if I can find somebody with a win 10 x64 machine (I have a win7)

 

Regards,

 

Florent


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Moderator
Moderator
1,631 Views
Registered: ‎11-09-2015

Re: TPG IP syth error at vivado 2017.3

Hi @sitting,

 

In fact I was able to reproduce the issue on my machine. And I am able to reproduce it using the same xci as you do. It seems that the issue is happening only on windows machine (works on linux) and with the exdes for 4ppc.

By default, I had the HDMI IP configured for 2 ppc so this is why I didn't had the issue.

 

Could you also tried with the HDMI IP configured for 2ppc?

 

I will report this issue to development

 

Regards,

 

Florent


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Adventurer
Adventurer
1,621 Views
Registered: ‎05-04-2014

Re: TPG IP syth error at vivado 2017.3

Hi @florentw,

 

I tried to change the ppc to 2, and the synthesis result passed. I am also looking forward to 4 ppc workaround.

 

 

Regards,

Sitting

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Moderator
Moderator
1,614 Views
Registered: ‎11-09-2015

Re: TPG IP syth error at vivado 2017.3

Hi @sitting,

 

For the moment the best workaround I can give you is to use a Linux machine... but we are investigating to find the root cause of the issue.

 

Regards,

 

Florent


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Observer seemasimon
Observer
1,382 Views
Registered: ‎08-23-2017

Re: TPG IP syth error at vivado 2017.3

Is there a workaround for the issue? I have the core configured as number of Pixels per clock as 2 and I am still seeing the error. 

 

 

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Moderator
Moderator
1,370 Views
Registered: ‎11-09-2015

Re: TPG IP syth error at vivado 2017.3

Hi @seemasimon,

 

The only workaround for the moment is to use Linux... Development is still working on it.

 

Regards,

 

Florent


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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