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UHD SDI TX/RX SS - How is the IP Block Design Diagram Preserved

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Contributor
Posts: 29
Registered: ‎08-26-2017
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UHD SDI TX/RX SS - How is the IP Block Design Diagram Preserved

Hi,

 

As per UG1118, VDS UG for Creating and Packaging Custom IP., Creating and Packaging a Block design as IP does not retain the block design diagram. 

 

But, we could see IP UHD SDI TX/RX Subsystem has the block design diagram intact unlike HDMI/DP/MiPi TX/RX SS. How has this become possible? Has there been any update on the block design packaging that lets the packaging retain the diagram?

 

Regards,

Ajay Kumar G 


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Moderator
Posts: 2,894
Registered: ‎11-09-2015

Re: UHD SDI TX/RX SS - How is the IP Block Design Diagram Preserved

Hi @ajaykumargurrala,

 

Yes I call a BD inside a BD nested BDs.

 

I don't know if there is any plan to make it available for customers in the future. This would need to be discussed with you FAE or sales contact.

 

Regards,

Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Moderator
Posts: 2,894
Registered: ‎11-09-2015

Re: UHD SDI TX/RX SS - How is the IP Block Design Diagram Preserved

[ Edited ]

Hi @ajaykumargurrala,

 

This feature (nested BDs) is not available to cutomers (at least not for the moment).

 

A workaround is to use hierarchy in your BD. It is not an IP but it allows to split a BD.

 

Regards,

Florent
Product Application Engineer - Xilinx Technical Support EMEA
------------------------------------------------------------------------------------------------------------------------
Don't forget to reply, kudo, and accept as solution.
Contributor
Posts: 29
Registered: ‎08-26-2017

Re: UHD SDI TX/RX SS - How is the IP Block Design Diagram Preserved

Hi @florentw

 

Am able to create hierarchical cell BDs and use. However, i wanted to try and understand packing the block designs as IP without losing the block diagram. When i tried packing a BD whether hierarchical or not, i used to lose the block diagram which is expected as mentioned in the user guide.

 

But with SDI TX/RX SS IP it was different., the block diagram remained intact even after it is packed into an IP. The older subsystem IPs like HDMI TX/RX, DP TX/RX were also a combination of subcores packed into one IP but the diagram was not intact.

 

So, i wanted to know if there is something new technique that has come up which helps us doing this.

 

Does the nested BDs that you are referring to., is what allows us to do this? If yes, is there any plan of making it available to customers anytime in future?

 

Thanks and Regards,

Ajay Kumar G

 

 

Moderator
Posts: 2,894
Registered: ‎11-09-2015

Re: UHD SDI TX/RX SS - How is the IP Block Design Diagram Preserved

Hi @ajaykumargurrala,

 

Yes I call a BD inside a BD nested BDs.

 

I don't know if there is any plan to make it available for customers in the future. This would need to be discussed with you FAE or sales contact.

 

Regards,

Florent
Product Application Engineer - Xilinx Technical Support EMEA
------------------------------------------------------------------------------------------------------------------------
Don't forget to reply, kudo, and accept as solution.
Contributor
Posts: 29
Registered: ‎08-26-2017

Re: UHD SDI TX/RX SS - How is the IP Block Design Diagram Preserved

Thank you for the details Florent.