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1,442 Views
Registered: ‎03-03-2017

Video pattern generator pattern images?

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Hi,

   Does anybody know if there is a document that shows what all the possible patterns look like on a monitor?

   There is a specific pattern I am looking for and I would prefer to not have to generate a design and look on a monitor to see all the possibilities.

Thanks.

Tim

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Moderator
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Registered: ‎11-09-2015

Re: Video pattern generator pattern images?

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Hi @tim_severance,

 

As @reaiken, I don't think there is this type of pattern in the TPG.

 

One other recommendation to generate it could be to use a VDMA. Use you processor to write the pattern then read with the VDMA.

 

Is there a reason why you want this specific pattern? If you have a valid use case, we might be able to ask for enhancement.

 

Regards,

 

 


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Voyager
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Registered: ‎03-28-2016

Re: Video pattern generator pattern images?

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Unfortunately, I don't know of any docs that show all possible combinations.  The TPG product guide is your best bet:

 

https://www.xilinx.com/support/documentation/ip_documentation/v_tpg/v7_0/pg103-v-tpg.pdf

 

It has descriptions, but no screen shots.  There are so many variations, it would be difficult to provide all possible combinations. 

 

You could build a system with a MicroBlaze and use it program the registers to try the various options.

 

Ted Booth - Tech. Lead FPGA Design Engineer
www.designlinxhs.com
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Registered: ‎11-09-2015

Re: Video pattern generator pattern images?

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Hi @tim_severance,

 

No we do not have any documents for all the output for the TPG.

 

You can try to do it in simulation and write the output to a picture file. To control the TPG you can use the VIP IP.

 

Regards,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Registered: ‎03-03-2017

Re: Video pattern generator pattern images?

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@florentw,

   I opened the example design which included a simulation, but there is no direction that I can find on what the results should be or how to have a picture file generated.   Do you know how I can get instructions on how to do this?

Thanks.

Tim

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Registered: ‎03-03-2017

Re: Video pattern generator pattern images?

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@florentw,

   I have setup the TPG to use BACKGROUND_PATTERN_ID=1 (horizontal ramp), but it appears to be taking ramping RGB together (giving me a black and white ramp).   Do you know if there is a way I can set it up to ramp R, then ramp G, then ramp B, then all togher, then loop back to ramping R etc?    Below is what I am getting versus what I would like to achieve.

 

What I am getting out of the TPG:

tpg_image.jpg

 

What I would like to get (ignore box in the middle):

Muxlabs_image.jpg

 

 

Thanks.Tim

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Adventurer
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Registered: ‎07-18-2011

Re: Video pattern generator pattern images?

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@tim_severance

 

The standard TPG is not configurable, it just puts out basic color bars, ramps, and flat field signals, along with a few more specialized patterns, like checkerboard, tartan bars, etc.

 

If you want an repeating single-pixel-per-step RGBY ramp pattern like that, you can make a custom AXI4-Stream video IP peripheral to generate it.   Just make a counter that counts from 0 to 255 (for 8-bit RGB) for the 8 R bits only, then the 8 G bits only, then the 8 B bits only, then for all 24 RGB bits together for the monochrome ramp, and repeat this pattern each line.  Add a horizontal and vertical counter to match your video standard to generate the SOF and EOL signals, and  make a simple AXI4-stream master back-end to generate the handshaking control to go with this data and you're good to go.

 

Alternately, if you aren't handy with writing custom AXI4-stream video peripherals, you can write a standard Verilog or VHDL IP block with counters for the RGB data as outlined above, and a horizontal and vertical counter with some logic to generate appropriate H and V sync signals and a DE signal output to match your video standard, and run that into a Video In to AXI4-Stream IP peripheral to format it as AXI4-Stream data.

 

 

 

 

 

 

 

 

 

 

 

 

 

Moderator
Moderator
1,864 Views
Registered: ‎11-09-2015

Re: Video pattern generator pattern images?

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Hi @tim_severance,

 

As @reaiken, I don't think there is this type of pattern in the TPG.

 

One other recommendation to generate it could be to use a VDMA. Use you processor to write the pattern then read with the VDMA.

 

Is there a reason why you want this specific pattern? If you have a valid use case, we might be able to ask for enhancement.

 

Regards,

 

 


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
1,290 Views
Registered: ‎03-03-2017

Re: Video pattern generator pattern images?

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@florentw / @reaiken

   Thanks for the suggestions.   Both the RTL and VDMA are good choices.   My only problem is I am strapped for time and was hoping there was a built in way to get the pattern.   I will plan to try one of these when I have time.  

 

@florentw,

   The reason I want this pattern is this pattern gives us a worst case supply current on the part I am testing.  It might be worth asking the development team if this could eventually be an option in the TPG.  

 

Thanks.  

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Adventurer
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Registered: ‎07-18-2011

Re: Video pattern generator pattern images?

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@tim_severanceAs @florentw suggested, if you already have a frame memory, writing a full frame of the pattern to a section of memory and VMDAing it out would be a much faster solution than my suggestion.

 

That one-pixel-per clock ramp is also a great test signal to check for timing errors or bit errors in logic, LVDS cables, display drivers, etc.  A timing error will show up as vertical lines in the color ramp pattern, or a pinkish line in the monochrome ramp.

 

As for future updates to the TPG IP, I would love to see an option for a programmable line of memory that can be written to via AXI4-Lite interface, so the user can write a custom line-based pattern such as this ramp signal.

 

Even better would be an option for up to three lines of memory, with a programmable register to set the vertical starting line for each pattern.  This would allow you to make custom line-based patterns that use two or three different lines, like SMPTE colorbars, EIA colorbars, /YREF bars, /RED bars, split-field colorbars etc., and write them quickly without having to write an entire frame of the pattern to the main memory.

 

 

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Registered: ‎03-03-2017

Re: Video pattern generator pattern images?

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@florentw, I agree with all of @reaiken's suggestions for TPG additions.

Tim

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Registered: ‎11-09-2015

Re: Video pattern generator pattern images?

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HI @reaiken,

 

I never saw it like that but it is true that all patern are a repetition of lines or column. So it might be usefull to be able to write on line or one column and have it replicated.

 

I will give the suggestion to development.

 

Regards,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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