08-18-2016 11:10 PM
I am using Vivado 2016.2 version.
I configured Video phy controller for HDMI rx only.
Then, I tried to simulate Video phy controller but It doesn't have any IP example design.
So, I created a simple tb to provide "mgtrefclk0_pad_p(n)_in, video_phy_sb_ack, video_phy_axi4lite_aclk" like xapp1275.
But Video phy doesn't work. No rxoutclk and No reset done signal.
From PG230, I also tried software reset after writing RX reset register (0x0024).
But still I couldn't see reset done signal.
How should I set up Video phy to generate rxoutclk at least?
Is there any reference how to configure
08-18-2016 11:47 PM
08-19-2016 12:54 AM
Thank you for reply.
But In my case, I only considered HDMI RX.
So vid_phy_rx_axi4s_aclk is connected to rxoutclk like xapp1275 and rx_video_clk should be generated from Video Phy.
Here, I didn't consider the xapp1275 application but rather I only tried to simulate Video Phy IP core.
Video Phy IP core should work at Vivado 2016.2
Also, Both Vivado version include the same Video phy version (2.0).