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Visitor rmillet
Visitor
2,226 Views
Registered: ‎05-30-2017

Xilinx Video PHY IP CMT ressources utilization

Hi all,

 

I'm working on the new ZCU102 (ES2) development kit and I would like to implement a pretty big design using multiple transceiver banks. I made a design with 2 Xilinx HDMI SS RX IPs and 2 Xilinx HDMI SS TX IPs using embedded HDMI RX/TX connectors + 1 FMC module.

 

These IPs are connected to 2 Video PHY IPs (RX + TX links each). This design use the 4 available MMCM ressources of the ZYNQ. I would like to add 2 to 4 independant SDI serial links connected on the same bank (SFP interfaces available on the board).

 

I suppose this PHY bank will need a CMT ressource available. Is there a way to share the MMCM ressources between the PHY or a solution to use other transceiver banks?

 

Is there some configuration in Video PHY IP to share MMCM ressources? I'm going to use the exact same GPU output and monitor on each channel.

 

Thanks.

Raphael

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Moderator
Moderator
1,429 Views
Registered: ‎11-09-2015

Re: Xilinx Video PHY IP CMT ressources utilization

Hi @rmillet,

 

Note that the video PHY is unencrypted HDL and you can modify it. This would be a way to merge the MMCMs

 

Regards,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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